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author | Sean Christopherson <sean.j.christopherson@intel.com> | 2019-02-06 00:01:16 +0300 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-02-21 00:48:35 +0300 |
commit | cae7ed3c2cb06680400adab632a243c5e5f42637 (patch) | |
tree | 29dbc5f36cb0416dfac9f667550f848008747216 /CREDITS | |
parent | 5192f9b976f9687569a90602b8a6c053da4498f6 (diff) | |
download | linux-cae7ed3c2cb06680400adab632a243c5e5f42637.tar.xz |
KVM: x86: Refactor the MMIO SPTE generation handling
The code to propagate the memslots generation number into MMIO sptes is
a bit convoluted. The "what" is relatively straightfoward, e.g. the
comment explaining which bits go where is quite readable, but the "how"
requires a lot of staring to understand what is happening. For example,
'MMIO_GEN_LOW_SHIFT' is actually used to calculate the high bits of the
spte, while 'MMIO_SPTE_GEN_LOW_SHIFT' is used to calculate the low bits.
Refactor the code to:
- use #defines whose values align with the bits defined in the comment
- use consistent code for both the high and low mask
- explicitly highlight the handling of bit 0 (update in-progress flag)
- explicitly call out that the defines are for MMIO sptes (to avoid
confusion with the per-vCPU MMIO cache, which uses the full memslots
generation)
In addition to making the code a little less magical, this paves the way
for moving the update in-progress flag to bit 63 without having to
simultaneously rewrite all of the MMIO spte code.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions