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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-02-02 18:56:14 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-02-02 18:56:14 +0300
commitd45fed4ff61c48890e55a590bdd7a9fb22457be8 (patch)
treed893037b9bea218ffc2d5652802835bfd865d4ea /Documentation/ABI
parent5e6a51787fef20b849682d8c49ec9c2beed5c373 (diff)
parent669c4614236a7f78a2b693d0024cbdfa8536eb5a (diff)
downloadlinux-d45fed4ff61c48890e55a590bdd7a9fb22457be8.tar.xz
Merge tag 'coresight-next-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
Suzuki writes: coresight: Updates for v6.3 - Dynamic TraceID allocation scheme for CoreSight trace source. Allows systems with > 44 CPUs to use the ETMs. TraceID is advertised via AUX_OUTPUT_HWID packets in perf.data. Also allows allocating trace-ids for non-CPU bound trace components (e.g., Qualcomm TPDA). - Support for Qualcomm TPDA and TPDM CoreSight devices. - Support for Ultrasoc SMB CoreSight Sink buffer. - Fixes for HiSilicon PTT driver - MAINTAINERS update: Add Reviewer for HiSilicon PTT driver - Bug fixes for CTI power management and sysfs mode - Fix CoreSight ETM4x TRCSEQRSTEVRn access Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> * tag 'coresight-next-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (35 commits) coresight: tmc: Don't enable TMC when it's not ready. coresight: tpda: fix return value check in tpda_probe() Coresight: tpda/tpdm: remove incorrect __exit annotation coresight: perf: Output trace id only once coresight: Fix uninitialised variable use in coresight_disable Documentation: coresight: tpdm: Add dummy comment after sysfs list Documentation: coresight: Extend title heading syntax in TPDM and TPDA documentation Documentation: trace: Add documentation for TPDM and TPDA dt-bindings: arm: Adds CoreSight TPDA hardware definitions Coresight: Add TPDA link driver coresight-tpdm: Add integration test support coresight-tpdm: Add DSB dataset support dt-bindings: arm: Add CoreSight TPDM hardware Coresight: Add coresight TPDM source driver coresight: core: Use IDR for non-cpu bound sources' paths. coresight: trace-id: Add debug & test macros to Trace ID allocation coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID kernel: events: Export perf_report_aux_output_id() coresight: trace id: Remove legacy get trace ID function. coresight: etmX.X: stm: Remove trace_id() callback ...
Diffstat (limited to 'Documentation/ABI')
-rw-r--r--Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x2
-rw-r--r--Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm13
-rw-r--r--Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb31
3 files changed, 45 insertions, 1 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
index 651602a61eac..234c33fbdb55 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
@@ -236,7 +236,7 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/traceid
Date: November 2014
KernelVersion: 3.19
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
-Description: (RW) Holds the trace ID that will appear in the trace stream
+Description: (RO) Holds the trace ID that will appear in the trace stream
coming from this trace entity.
What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/trigger_event
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
new file mode 100644
index 000000000000..4a58e649550d
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
@@ -0,0 +1,13 @@
+What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
+Date: January 2023
+KernelVersion 6.2
+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
+Description:
+ (Write) Run integration test for tpdm. Integration test
+ will generate test data for tpdm. It can help to make
+ sure that the trace path is enabled and the link configurations
+ are fine.
+
+ Accepts only one of the 2 values - 1 or 2.
+ 1 : Generate 64 bits data
+ 2 : Generate 32 bits data
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb b/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb
new file mode 100644
index 000000000000..f560918ae738
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb
@@ -0,0 +1,31 @@
+What: /sys/bus/coresight/devices/ultra_smb<N>/enable_sink
+Date: January 2023
+KernelVersion: 6.3
+Contact: Junhao He <hejunhao3@huawei.com>
+Description: (RW) Add/remove a SMB device from a trace path. There can be
+ multiple sources for a single SMB device.
+
+What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_size
+Date: January 2023
+KernelVersion: 6.3
+Contact: Junhao He <hejunhao3@huawei.com>
+Description: (RO) Shows the buffer size of each UltraSoc SMB device.
+
+What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_status
+Date: January 2023
+KernelVersion: 6.3
+Contact: Junhao He <hejunhao3@huawei.com>
+Description: (RO) Shows the value of UltraSoc SMB status register.
+ BIT(0) is zero means buffer is empty.
+
+What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/read_pos
+Date: January 2023
+KernelVersion: 6.3
+Contact: Junhao He <hejunhao3@huawei.com>
+Description: (RO) Shows the value of UltraSoc SMB Read Pointer register.
+
+What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/write_pos
+Date: January 2023
+KernelVersion: 6.3
+Contact: Junhao He <hejunhao3@huawei.com>
+Description: (RO) Shows the value of UltraSoc SMB Write Pointer register.