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author | Alexandre Ghiti <alexghiti@rivosinc.com> | 2023-08-02 11:03:26 +0300 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-08-16 17:28:21 +0300 |
commit | 57972127b20ef9cb84fc214f7cfacaa7ab884a38 (patch) | |
tree | b993ca8ddd6d6a5416cf0888d601d014c9506863 /Documentation/admin-guide/sysctl/kernel.rst | |
parent | cc4c07c89aada16229084eeb93895c95b7eabaa3 (diff) | |
download | linux-57972127b20ef9cb84fc214f7cfacaa7ab884a38.tar.xz |
Documentation: admin-guide: Add riscv sysctl_perf_user_access
riscv now uses this sysctl so document its usage for this architecture.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Diffstat (limited to 'Documentation/admin-guide/sysctl/kernel.rst')
-rw-r--r-- | Documentation/admin-guide/sysctl/kernel.rst | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst index 3800fab1619b..8019103aac10 100644 --- a/Documentation/admin-guide/sysctl/kernel.rst +++ b/Documentation/admin-guide/sysctl/kernel.rst @@ -941,16 +941,35 @@ enabled, otherwise writing to this file will return ``-EBUSY``. The default value is 8. -perf_user_access (arm64 only) -================================= +perf_user_access (arm64 and riscv only) +======================================= + +Controls user space access for reading perf event counters. -Controls user space access for reading perf event counters. When set to 1, -user space can read performance monitor counter registers directly. +arm64 +===== The default value is 0 (access disabled). +When set to 1, user space can read performance monitor counter registers +directly. + See Documentation/arch/arm64/perf.rst for more information. +riscv +===== + +When set to 0, user space access is disabled. + +The default value is 1, user space can read performance monitor counter +registers through perf, any direct access without perf intervention will trigger +an illegal instruction. + +When set to 2, which enables legacy mode (user space has direct access to cycle +and insret CSRs only). Note that this legacy value is deprecated and will be +removed once all user space applications are fixed. + +Note that the time CSR is always directly accessible to all modes. pid_max ======= |