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author | Jonathan Corbet <corbet@lwn.net> | 2023-05-04 01:47:22 +0300 |
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committer | Jonathan Corbet <corbet@lwn.net> | 2023-06-12 15:33:40 +0300 |
commit | e790a4ce529041bb21ec0b69a38c1b92f29df2cf (patch) | |
tree | 56f44e5f8f8fe8d94d43a4bd7743e82e4e7889d6 /Documentation/arch/arm/swp_emulation.rst | |
parent | f1fcbaa18b28dec10281551dfe6ed3a3ed80e3d6 (diff) | |
download | linux-e790a4ce529041bb21ec0b69a38c1b92f29df2cf.tar.xz |
arm: docs: Move Arm documentation to Documentation/arch/
Architecture-specific documentation is being moved into Documentation/arch/
as a way of cleaning up the top-level documentation directory and making
the docs hierarchy more closely match the source hierarchy. Move
Documentation/arm into arch/ (along with the Chinese equvalent
translations).
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Samuel Holland <samuel@sholland.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Alex Shi <alexs@kernel.org>
Cc: linux-doc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arch@vger.kernel.org
Acked-by: Alexandre TORGUE <alexandre.torgue@foss.st.com>
Reviewed-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/arch/arm/swp_emulation.rst')
-rw-r--r-- | Documentation/arch/arm/swp_emulation.rst | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/arch/arm/swp_emulation.rst b/Documentation/arch/arm/swp_emulation.rst new file mode 100644 index 000000000000..6a608a9c3715 --- /dev/null +++ b/Documentation/arch/arm/swp_emulation.rst @@ -0,0 +1,27 @@ +Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE) +--------------------------------------------------------------------- + +ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds +moving to the load-locked/store-conditional instructions LDREX and STREX. + +ARMv7 multiprocessing extensions introduce the ability to disable these +instructions, triggering an undefined instruction exception when executed. +Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB +sequence. If a memory access fault (an abort) occurs, a segmentation fault is +signalled to the triggering process. + +/proc/cpu/swp_emulation holds some statistics/information, including the PID of +the last process to trigger the emulation to be invocated. For example:: + + Emulated SWP: 12 + Emulated SWPB: 0 + Aborted SWP{B}: 1 + Last process: 314 + + +NOTE: + when accessing uncached shared regions, LDREX/STREX rely on an external + transaction monitoring block called a global monitor to maintain update + atomicity. If your system does not implement a global monitor, this option can + cause programs that perform SWP operations to uncached memory to deadlock, as + the STREX operation will always fail. |