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| author | Emil Renner Berthing <emil.renner.berthing@canonical.com> | 2023-10-31 17:14:43 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-11-22 14:58:08 +0300 |
| commit | 3d70b9853b44d3f034acaf5e3be7d5228daddef4 (patch) | |
| tree | 4107271f266deb65b4fc905df2cec046bfebff22 /Documentation/devicetree/bindings/cache | |
| parent | 971f128bb2d9314203d365b7f163a5c35167bb6b (diff) | |
| download | linux-3d70b9853b44d3f034acaf5e3be7d5228daddef4.tar.xz | |
dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible
This cache controller is also used on the StarFive JH7100 SoC.
Unfortunately it needs a quirk to work properly, so add dedicated
compatible string to be able to match it.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'Documentation/devicetree/bindings/cache')
| -rw-r--r-- | Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index 8a6a78e1a7ab..7e8cebe21584 100644 --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -38,7 +38,9 @@ properties: - sifive,fu740-c000-ccache - const: cache - items: - - const: starfive,jh7110-ccache + - enum: + - starfive,jh7100-ccache + - starfive,jh7110-ccache - const: sifive,ccache0 - const: cache - items: @@ -88,6 +90,7 @@ allOf: contains: enum: - sifive,fu740-c000-ccache + - starfive,jh7100-ccache - starfive,jh7110-ccache - microchip,mpfs-ccache @@ -111,6 +114,7 @@ allOf: contains: enum: - sifive,fu740-c000-ccache + - starfive,jh7100-ccache - starfive,jh7110-ccache then: |