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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2024-04-22 13:53:52 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-04-25 21:12:14 +0300 |
| commit | f33dca9ed6f41c8acf2c17c402738deddb7d7c28 (patch) | |
| tree | 4f4b4775731c2c34e99e075f9333336264f15344 /Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml | |
| parent | 2d03ce9cd7bdd1e29772f8ecf7769535361c7eaa (diff) | |
| download | linux-f33dca9ed6f41c8acf2c17c402738deddb7d7c28.tar.xz | |
dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> for RZ/G3S
The driver will be modified (in the next commits) to be able to specify
individual power domain IDs for each IP. The driver will still
support #power-domain-cells = <0>, thus, previous users are not
affected.
The #power-domain-cells = <1> has been instantiated only for RZ/G3S at
the moment, as individual platform clock drivers need to be adapted for
this to be supported on the rest of the SoCs.
Also, the description for #power-domain-cells is updated with links to
per-SoC power domain IDs.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20240422105355.1622177-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml')
0 files changed, 0 insertions, 0 deletions