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author | Shuijing Li <shuijing.li@mediatek.com> | 2024-04-12 06:11:39 +0300 |
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committer | Chun-Kuang Hu <chunkuang.hu@kernel.org> | 2024-04-22 16:40:34 +0300 |
commit | 417d8c47271d5cf1a705e997065873b2a9a36fd4 (patch) | |
tree | 39884383246c70de18d87f2ab849d9764e73a95e /Documentation/devicetree/bindings/display | |
parent | 8431fff9e0f3fc1c5844cf99a73b49b63ceed481 (diff) | |
download | linux-417d8c47271d5cf1a705e997065873b2a9a36fd4.tar.xz |
drm/mediatek: dsi: Correct calculation formula of PHY Timing
This patch correct calculation formula of PHY timing.
The spec define HS-PREPARE should be from 40ns+4*UI(44ns) to
85ns+6*UI(91ns). But current duration is 88ns and is near the boundary.
So this patch make the duration to 64ns so it is near the safe range.
Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20240412031208.30688-1-shuijing.li@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/display')
0 files changed, 0 insertions, 0 deletions