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authorRafał Miłecki <rafal@milecki.pl>2024-02-13 09:39:19 +0300
committerVinod Koul <vkoul@kernel.org>2024-02-16 15:18:22 +0300
commitfa3400504824944ec04bd3f236fd5ac57c099fd5 (patch)
treedb1ec70f889e92bfc6fceec6021087dd6812e05d /Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml
parentcf497f3585f944ff42cc2c84453569f37a1bd6b9 (diff)
downloadlinux-fa3400504824944ec04bd3f236fd5ac57c099fd5.tar.xz
dt-bindings: dma: convert MediaTek High-Speed controller to the json-schema
This helps validating DTS files. Introduced changes: 1. Adjusted "reg" in example 2. Added includes to example Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240213063919.20196-1-zajec5@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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diff --git a/Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml b/Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml
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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek High-Speed DMA Controller
+
+maintainers:
+ - Sean Wang <sean.wang@mediatek.com>
+
+allOf:
+ - $ref: dma-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt7622-hsdma
+ - mediatek,mt7623-hsdma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: hsdma
+
+ power-domains:
+ maxItems: 1
+
+ "#dma-cells":
+ description: Channel number
+ const: 1
+
+required:
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - power-domains
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt2701-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/mt2701-power.h>
+
+ dma-controller@1b007000 {
+ compatible = "mediatek,mt7623-hsdma";
+ reg = <0x1b007000 0x1000>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ethsys CLK_ETHSYS_HSDMA>;
+ clock-names = "hsdma";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+ #dma-cells = <1>;
+ };