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| author | Rob Herring <robh@kernel.org> | 2024-04-01 23:43:53 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2024-04-07 11:14:50 +0300 |
| commit | 7eccb5a5b224be42431c8087c9c9e016636ff3b5 (patch) | |
| tree | b568323c56dfdc513d08e7d6c64590abc5abd8a3 /Documentation/devicetree/bindings/dma | |
| parent | 2b1c1cf08a0addb6df42f16b37133dc7a351de29 (diff) | |
| download | linux-7eccb5a5b224be42431c8087c9c9e016636ff3b5.tar.xz | |
dt-bindings: dma: snps,dma-spear1340: Fix data{-,_}width schema
'data-width' and 'data_width' properties are defined as arrays, but the
schema is defined as a matrix. That works currently since everything gets
decoded in to matrices, but that is internal to dtschema and could change.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240401204354.1691845-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
| -rw-r--r-- | Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 5da8291a7de0..c21a4f073f6c 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -93,10 +93,10 @@ properties: data-width: $ref: /schemas/types.yaml#/definitions/uint32-array description: Data bus width per each DMA master in bytes. + minItems: 1 + maxItems: 4 items: - maxItems: 4 - items: - enum: [4, 8, 16, 32] + enum: [4, 8, 16, 32] data_width: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -106,28 +106,28 @@ properties: deprecated. It' usage is discouraged in favor of data-width one. Moreover the property incorrectly permits to define data-bus width of 8 and 16 bits, which is impossible in accordance with DW DMAC IP-core data book. + minItems: 1 + maxItems: 4 items: - maxItems: 4 - items: - enum: - - 0 # 8 bits - - 1 # 16 bits - - 2 # 32 bits - - 3 # 64 bits - - 4 # 128 bits - - 5 # 256 bits - default: 0 + enum: + - 0 # 8 bits + - 1 # 16 bits + - 2 # 32 bits + - 3 # 64 bits + - 4 # 128 bits + - 5 # 256 bits + default: 0 multi-block: $ref: /schemas/types.yaml#/definitions/uint32-array description: | LLP-based multi-block transfer supported by hardware per each DMA channel. + minItems: 1 + maxItems: 8 items: - maxItems: 8 - items: - enum: [0, 1] - default: 1 + enum: [0, 1] + default: 1 snps,max-burst-len: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -138,11 +138,11 @@ properties: will be from 1 to max-burst-len words. It's an array property with one cell per channel in the units determined by the value set in the CTLx.SRC_TR_WIDTH/CTLx.DST_TR_WIDTH fields (data width). + minItems: 1 + maxItems: 8 items: - maxItems: 8 - items: - enum: [4, 8, 16, 32, 64, 128, 256] - default: 256 + enum: [4, 8, 16, 32, 64, 128, 256] + default: 256 snps,dma-protection-control: $ref: /schemas/types.yaml#/definitions/uint32 |