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authorLars-Peter Clausen <lars@metafoo.de>2023-04-06 18:48:33 +0300
committerWolfram Sang <wsa@kernel.org>2023-04-13 19:43:05 +0300
commit8455460914b98fba260786e174f8d645aa3d21aa (patch)
tree8907cb39813a6d7cf59678f4b2a94cd14dcf858f /Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
parentf82fd1845d309407a6ddc3a1c97c6088189c3a58 (diff)
downloadlinux-8455460914b98fba260786e174f8d645aa3d21aa.tar.xz
dt-bindings: i2c: cadence: Document `resets` property
The Cadence I2C controller has an external reset that needs to be de-asserted before the I2C controller can be accessed. Document the `resets` devicetree property that can be used to describe how the reset signal is connected. While the reset signal will always be present in hardware the devicetree property is kept optional for backwards compatibility with existing systems that do not specify the reset property and where the reset signal might not be controlled by operating system. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml')
-rw-r--r--Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
index 9187015d9702..cb24d7b3221c 100644
--- a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
+++ b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
@@ -24,6 +24,9 @@ properties:
clocks:
minItems: 1
+ resets:
+ maxItems: 1
+
interrupts:
maxItems: 1
@@ -59,6 +62,7 @@ examples:
i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
clocks = <&clkc 38>;
+ resets = <&rstc 288>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xe0004000 0x1000>;
clock-frequency = <400000>;