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author | Sam Protsenko <semen.protsenko@linaro.org> | 2021-12-05 00:58:13 +0300 |
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committer | Wolfram Sang <wsa@kernel.org> | 2021-12-09 12:02:09 +0300 |
commit | 5ae451148eba181b71575a88fa344fe09a840cf3 (patch) | |
tree | 4d8c08d7bd10e859cd11e74c5bc43062a3d306ad /Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | |
parent | 92ae3162840072b24ad1c4e3abf3c3d6bd012dee (diff) | |
download | linux-5ae451148eba181b71575a88fa344fe09a840cf3.tar.xz |
dt-bindings: i2c: exynos5: Convert to dtschema
Convert Samsung Exynos High Speed I2C bindings doc to DT schema format.
Changes during bindings conversion:
1. Added missing required clock properties (driver fails when it's
unable to get the clock)
2. Removed properties and descriptions that can be found in
schemas/i2c/i2c-controller.yaml [1]
3. Fixed the example so it can be validated by dtschema
[1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml new file mode 100644 index 000000000000..16853f6edc53 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung's High Speed I2C controller + +maintainers: + - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> + +description: | + The Samsung's High Speed I2C controller is used to interface with I2C devices + at various speeds ranging from 100kHz to 3.4MHz. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - enum: + - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 + - samsung,exynos5260-hsi2c # Exynos5260 + - samsung,exynos7-hsi2c # Exynos7 + - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 + deprecated: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-frequency: + default: 100000 + description: + Desired operating frequency in Hz of the bus. + + If not specified, the bus operates in fast-speed mode at 100kHz. + + If specified, the bus operates in high-speed mode only if the + clock-frequency is >= 1MHz. + + clocks: + maxItems: 1 + description: I2C operating clock + + clock-names: + const: hsi2c + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/exynos5420.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + hsi2c_8: i2c@12e00000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12e00000 0x1000>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + clocks = <&clock CLK_USI4>; + clock-names = "hsi2c"; + + pmic@66 { + /* compatible = "samsung,s2mps11-pmic"; */ + reg = <0x66>; + }; + }; |