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authorLinus Torvalds <torvalds@linux-foundation.org>2019-12-02 22:41:35 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2019-12-02 22:41:35 +0300
commit2c97b5ae83dca56718774e7b4bf9640f05d11867 (patch)
tree13488f899e4bc23163882aa8292c99ea394638cb /Documentation/devicetree/bindings/i2c/i2c-stm32.txt
parent8328dd2f394e48a010383af176bf55ba4be79da0 (diff)
parenta8de1304b7df30e3a14f2a8b9709bb4ff31a0385 (diff)
downloadlinux-2c97b5ae83dca56718774e7b4bf9640f05d11867.tar.xz
Merge tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring: - DT schemas for PWM, syscon, power domains, SRAM, syscon-reboot, syscon-poweroff, renesas-irqc, simple-pm-bus, renesas-bsc, pwm-rcar, Renesas tpu, at24 eeprom, rtc-sh, Allwinner PS/2, sharp,ld-d5116z01b panel, Arm SMMU, max77650, Meson CEC, Amlogic canvas and DWC3 glue, Allwinner A10 mUSB and CAN, TI Davinci MDIO, QCom QCS404 interconnect, Unisoc/Spreadtrum SoCs and UART - Convert a bunch of Samsung bindings to DT schema - Convert a bunch of ST stm32 bindings to DT schema - Realtek and Exynos additions to Arm Mali bindings - Fix schema errors in RiscV CPU schema - Various schema fixes from improved meta-schema checks - Improve the handling of 'dma-ranges' and in particular fix DMA mask setup on PCI bridges - Fix a memory leak in add_changeset_property() and DT unit tests. - Several documentation improvements for schema validation - Rework build rules to improve schema validation errors - Color output for dtx_diff * tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (138 commits) libfdt: define INT32_MAX and UINT32_MAX in libfdt_env.h dt-bindings: arm: Remove leftover axentia.txt of: unittest: fix memory leak in attach_node_and_children of: overlay: add_changeset_property() memory leak dt-bindings: interrupt-controller: arm,gic-v3: Add missing type to interrupt-partition-* nodes dt-bindings: firmware: ixp4xx: Drop redundant minItems/maxItems dt-bindings: power: Rename back power_domain.txt bindings to fix references dt-bindings: i2c: stm32: Migrate i2c-stm32 documentation to yaml dt-bindings: mtd: Convert stm32 fmc2-nand bindings to json-schema dt-bindings: remoteproc: convert stm32-rproc to json-schema dt-bindings: mailbox: convert stm32-ipcc to json-schema dt-bindings: mfd: Convert stm32 low power timers bindings to json-schema dt-bindings: interrupt-controller: Convert stm32-exti to json-schema dt-bindings: crypto: Convert stm32 HASH bindings to json-schema dt-bindings: rng: Convert stm32 RNG bindings to json-schema dt-bindings: pwm: Convert Samsung PWM bindings to json-schema dt-bindings: pwm: Convert PWM bindings to json-schema dt-bindings: serial: Add a new compatible string for SC9863A dt-bindings: serial: Convert sprd-uart to json-schema dt-bindings: arm: Add bindings for Unisoc SC9863A ...
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-* I2C controller embedded in STMicroelectronics STM32 I2C platform
-
-Required properties:
-- compatible: Must be one of the following
- - "st,stm32f4-i2c"
- - "st,stm32f7-i2c"
-- reg: Offset and length of the register set for the device
-- interrupts: Must contain the interrupt id for I2C event and then the
- interrupt id for I2C error.
-- resets: Must contain the phandle to the reset controller.
-- clocks: Must contain the input clock of the I2C instance.
-- A pinctrl state named "default" must be defined to set pins in mode of
- operation for I2C transfer
-- #address-cells = <1>;
-- #size-cells = <0>;
-
-Optional properties:
-- clock-frequency: Desired I2C bus clock frequency in Hz. If not specified,
- the default 100 kHz frequency will be used.
- For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are
- 100000 and 400000.
- For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode
- Plus are supported, possible values are 100000, 400000 and 1000000.
-- dmas: List of phandles to rx and tx DMA channels. Refer to stm32-dma.txt.
-- dma-names: List of dma names. Valid names are: "rx" and "tx".
-- i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25)
- For STM32F7, STM32H7 and STM32MP1 only.
-- i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)
- For STM32F7, STM32H7 and STM32MP1 only.
- I2C Timings are derived from these 2 values
-- st,syscfg-fmp: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
- Plus speed is selected by slave.
- 1st cell: phandle to syscfg
- 2nd cell: register offset within SYSCFG
- 3rd cell: register bitmask for FMP bit
- For STM32F7, STM32H7 and STM32MP1 only.
-
-Example:
-
- i2c@40005400 {
- compatible = "st,stm32f4-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x40005400 0x400>;
- interrupts = <31>,
- <32>;
- resets = <&rcc 277>;
- clocks = <&rcc 0 149>;
- pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
- pinctrl-names = "default";
- };
-
- i2c@40005400 {
- compatible = "st,stm32f7-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x40005400 0x400>;
- interrupts = <31>,
- <32>;
- resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
- clocks = <&rcc 1 CLK_I2C1>;
- pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
- pinctrl-names = "default";
- st,syscfg-fmp = <&syscfg 0x4 0x1>;
- };