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authorWill Deacon <will@kernel.org>2023-01-24 14:45:41 +0300
committerWill Deacon <will@kernel.org>2023-01-24 14:45:41 +0300
commit8a24401701aa67c3bf8daa56c54d7bd1d6e69c23 (patch)
tree8608028e883cd70a14965f13112eb3dc91f69885 /Documentation/devicetree/bindings/iommu
parent5fba66d42746c9b8063de7ce4565d0173da657a2 (diff)
parenteb9181a3ae6021d7a12ed7f1d6a15804628cbe98 (diff)
downloadlinux-8a24401701aa67c3bf8daa56c54d7bd1d6e69c23.tar.xz
Merge branch 'for-joerg/arm-smmu/bindings' into for-joerg/arm-smmu/updates
Updates to the Arm SMMU device-tree bindings. * for-joerg/arm-smmu/bindings: dt-bindings: arm-smmu: Fix binding for SDX55 and SDX65 dt-bindings: arm-smmu: Document smmu-500 binding for SM6125 dt-bindings: arm-smmu: document the smmu on Qualcomm SA8775P dt-bindings: arm-smmu: disallow clocks when not used dt-bindings: iommu: qcom: Add Qualcomm MSM8953 compatible dt-bindings: arm-smmu: Add sm8150-smmu-500 to the list of Adreno smmus dt-bindings: arm-smmu: Allow 3 power domains on SM6375 MMU500
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu.yaml66
-rw-r--r--Documentation/devicetree/bindings/iommu/qcom,iommu.txt1
2 files changed, 58 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index b28c5c2b0ff2..807cb511fe18 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -36,13 +36,17 @@ properties:
- enum:
- qcom,qcm2290-smmu-500
- qcom,qdu1000-smmu-500
+ - qcom,sa8775p-smmu-500
- qcom,sc7180-smmu-500
- qcom,sc7280-smmu-500
- qcom,sc8180x-smmu-500
- qcom,sc8280xp-smmu-500
- qcom,sdm670-smmu-500
- qcom,sdm845-smmu-500
+ - qcom,sdx55-smmu-500
+ - qcom,sdx65-smmu-500
- qcom,sm6115-smmu-500
+ - qcom,sm6125-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
- qcom,sm8150-smmu-500
@@ -52,14 +56,6 @@ properties:
- const: qcom,smmu-500
- const: arm,mmu-500
- - description: Qcom SoCs implementing "arm,mmu-500" (non-qcom implementation)
- deprecated: true
- items:
- - enum:
- - qcom,sdx55-smmu-500
- - qcom,sdx65-smmu-500
- - const: arm,mmu-500
-
- description: Qcom SoCs implementing "arm,mmu-500" (legacy binding)
deprecated: true
items:
@@ -84,6 +80,7 @@ properties:
items:
- enum:
- qcom,sc7280-smmu-500
+ - qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- const: qcom,adreno-smmu
- const: arm,mmu-500
@@ -201,7 +198,8 @@ properties:
maxItems: 7
power-domains:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
nvidia,memory-controller:
description: |
@@ -366,6 +364,56 @@ allOf:
- description: interface clock required to access smmu's registers
through the TCU's programming interface.
+ # Disallow clocks for all other platforms with specific compatibles
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cavium,smmu-v2
+ - marvell,ap806-smmu-500
+ - nvidia,smmu-500
+ - qcom,qcm2290-smmu-500
+ - qcom,qdu1000-smmu-500
+ - qcom,sa8775p-smmu-500
+ - qcom,sc7180-smmu-500
+ - qcom,sc8180x-smmu-500
+ - qcom,sc8280xp-smmu-500
+ - qcom,sdm670-smmu-500
+ - qcom,sdm845-smmu-500
+ - qcom,sdx55-smmu-500
+ - qcom,sdx65-smmu-500
+ - qcom,sm6115-smmu-500
+ - qcom,sm6125-smmu-500
+ - qcom,sm6350-smmu-500
+ - qcom,sm6375-smmu-500
+ - qcom,sm8350-smmu-500
+ - qcom,sm8450-smmu-500
+ then:
+ properties:
+ clock-names: false
+ clocks: false
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,sm6375-smmu-500
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: SNoC MMU TBU RT GDSC
+ - description: SNoC MMU TBU NRT GDSC
+ - description: SNoC TURING MMU TBU0 GDSC
+
+ required:
+ - power-domains
+ else:
+ properties:
+ power-domains:
+ maxItems: 1
+
examples:
- |+
/* SMMU with stream matching or stream indexing */
diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
index 059139abce35..e6cecfd360eb 100644
--- a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
@@ -10,6 +10,7 @@ to non-secure vs secure interrupt line.
- compatible : Should be one of:
"qcom,msm8916-iommu"
+ "qcom,msm8953-iommu"
Followed by "qcom,msm-iommu-v1".