summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/iommu
diff options
context:
space:
mode:
authorKonrad Dybcio <konrad.dybcio@linaro.org>2023-03-15 13:52:08 +0300
committerWill Deacon <will@kernel.org>2023-03-27 14:37:01 +0300
commit3ad6585509dc8157e598dbd06b71efed2e45fee8 (patch)
tree7300dd140a304f4f6727e0cc0be9f5da179b2fae /Documentation/devicetree/bindings/iommu
parent16d1646871fbe800c9751f0816a970f9126a6586 (diff)
downloadlinux-3ad6585509dc8157e598dbd06b71efed2e45fee8.tar.xz
dt-bindings: arm-smmu: Document SM61[12]5 GPU SMMU
Both of these SoCs have a Qualcomm MMU500 implementation of SMMU in front of their GPUs that expect 3 clocks. Both of them also have an APPS SMMU that expects no clocks. Remove qcom,sm61[12]5-smmu-500 from the "no clocks" list (intentionally 'breaking' the schema checks of APPS SMMU, as now it *can* accept clocks - with the current structure of this file it would have taken a wastefully-long time to sort this out properly..) and add necessary yaml to describe the clocks required by the GPU SMMUs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230315-topic-kamorta_adrsmmu-v1-1-d1c0dea90bd9@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu.yaml28
1 files changed, 26 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index f45e4296a5ea..ba677d401e24 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -80,6 +80,8 @@ properties:
items:
- enum:
- qcom,sc7280-smmu-500
+ - qcom,sm6115-smmu-500
+ - qcom,sm6125-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
@@ -376,6 +378,30 @@ allOf:
- description: interface clock required to access smmu's registers
through the TCU's programming interface.
+ - if:
+ properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,sm6115-smmu-500
+ - qcom,sm6125-smmu-500
+ - const: qcom,adreno-smmu
+ - const: qcom,smmu-500
+ - const: arm,mmu-500
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: mem
+ - const: hlos
+ - const: iface
+
+ clocks:
+ items:
+ - description: GPU memory bus clock
+ - description: Voter clock required for HLOS SMMU access
+ - description: Interface clock required for register access
+
# Disallow clocks for all other platforms with specific compatibles
- if:
properties:
@@ -395,8 +421,6 @@ allOf:
- qcom,sdm845-smmu-500
- qcom,sdx55-smmu-500
- qcom,sdx65-smmu-500
- - qcom,sm6115-smmu-500
- - qcom,sm6125-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
- qcom,sm8350-smmu-500