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author | Rafał Miłecki <rafal@milecki.pl> | 2021-10-08 23:59:36 +0300 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2021-10-14 02:09:06 +0300 |
commit | 0398adaec3419bdfa93baae70a3b696b4abdd7ad (patch) | |
tree | 3cba0e822cf3a31c7a34145ced7cf9b8467b2c66 /Documentation/devicetree/bindings/mfd/brcm,cru.yaml | |
parent | 64570fbc14f8d7cb3fe3995f20e26bc25ce4b2cc (diff) | |
download | linux-0398adaec3419bdfa93baae70a3b696b4abdd7ad.tar.xz |
Revert "dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon"
This reverts commit 2ae80900f239484069569380e1fc4340fd6e0089.
My rework was unneeded & wrong. It replaced a clear & correct "reg"
property usage with a custom "offset" one.
Back then I didn't understand how to properly handle CRU block binding.
I heard / read about syscon and tried to use it in a totally invalid
way. That change also missed Rob's review (obviously).
Northstar's pin controller is a simple consistent hardware block that
can be cleanly mapped using a 0x24 long reg space.
Since the rework commit there wasn't any follow up modifying in-kernel
DTS files to use the new binding. Broadcom also isn't known to use that
bugged binding. There is close to zero chance this revert may actually
cause problems / regressions.
This commit is a simple revert. Example binding may (should) be updated
/ cleaned up but that can be handled separately.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008205938.29925-1-zajec5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mfd/brcm,cru.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/mfd/brcm,cru.yaml | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml index fc1317ab3226..28ac60acf4ac 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml @@ -32,13 +32,13 @@ properties: "#size-cells": const: 1 - pinctrl: - $ref: ../pinctrl/brcm,ns-pinmux.yaml - patternProperties: '^clock-controller@[a-f0-9]+$': $ref: ../clock/brcm,iproc-clocks.yaml + '^pin-controller@[a-f0-9]+$': + $ref: ../pinctrl/brcm,ns-pinmux.yaml + '^thermal@[a-f0-9]+$': $ref: ../thermal/brcm,ns-thermal.yaml @@ -73,9 +73,10 @@ examples: "iprocfast", "sata1", "sata2"; }; - pinctrl { + pin-controller@1c0 { compatible = "brcm,bcm4708-pinmux"; - offset = <0x1c0>; + reg = <0x1c0 0x24>; + reg-names = "cru_gpio_control"; }; thermal@2c0 { |