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author | Ludovic Barre <ludovic.barre@st.com> | 2020-01-28 12:06:32 +0300 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2020-03-24 16:35:40 +0300 |
commit | e19c33dbfe95e1807be3eb6f252aa60ad5ace531 (patch) | |
tree | bd56c4afa18d440af5d7fd797ea38cece02b8cfc /Documentation/devicetree/bindings/mmc | |
parent | 31b963e19491692e56da00b15fd29623f5c5d0cf (diff) | |
download | linux-e19c33dbfe95e1807be3eb6f252aa60ad5ace531.tar.xz |
dt-bindings: mmc: mmci: add delay block base register for sdmmc
To support the sdr104 mode, the sdmmc variant has a hardware delay block to
manage the clock phase when sampling data received by the card.
This patch adds a second base register (optional) for sdmmc delay block.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200128090636.13689-6-ludovic.barre@st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
-rw-r--r-- | Documentation/devicetree/bindings/mmc/mmci.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt index 6d3c626e017d..4ec921e4bf34 100644 --- a/Documentation/devicetree/bindings/mmc/mmci.txt +++ b/Documentation/devicetree/bindings/mmc/mmci.txt @@ -28,6 +28,8 @@ specific for ux500 variant: - st,sig-pin-fbclk : feedback clock signal pin used. specific for sdmmc variant: +- reg : a second base register may be defined if a delay + block is present and used for tuning. - st,sig-dir : signal direction polarity used for cmd, dat0 dat123. - st,neg-edge : data & command phase relation, generated on sd clock falling edge. |