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authorRoland Stigge <stigge@antcom.de>2012-04-22 14:01:19 +0400
committerRoland Stigge <stigge@antcom.de>2012-04-22 14:01:19 +0400
commit4de02e4a280678224bd12ec3b182e369c87c8fc5 (patch)
tree455634803a31baa98276ab8d98c37863eb184256 /Documentation/devicetree/bindings/net/lpc-eth.txt
parentb41a216dafe4dd23c95cb4203de288f773a097a6 (diff)
downloadlinux-4de02e4a280678224bd12ec3b182e369c87c8fc5.tar.xz
net: Add device tree support to LPC32xx
This patch adds device tree support for lpc_eth.c. The runtime option for MII/RMII is solved via the "phy-mode" property, SRAM ("IRAM") usage for DMA can be chosen via "use-iram". Signed-off-by: Roland Stigge <stigge@antcom.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/net/lpc-eth.txt')
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diff --git a/Documentation/devicetree/bindings/net/lpc-eth.txt b/Documentation/devicetree/bindings/net/lpc-eth.txt
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+* NXP LPC32xx SoC Ethernet Controller
+
+Required properties:
+- compatible: Should be "nxp,lpc-eth"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain ethernet controller interrupt
+
+Optional properties:
+- phy-mode: String, operation mode of the PHY interface.
+ Supported values are: "mii", "rmii" (default)
+- use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering
+- local-mac-address : 6 bytes, mac address
+
+Example:
+
+ mac: ethernet@31060000 {
+ compatible = "nxp,lpc-eth";
+ reg = <0x31060000 0x1000>;
+ interrupt-parent = <&mic>;
+ interrupts = <29 0>;
+
+ phy-mode = "rmii";
+ use-iram;
+ };