diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2020-05-14 09:54:19 +0300 |
---|---|---|
committer | Rob Herring <robh@kernel.org> | 2020-05-28 05:47:47 +0300 |
commit | 44f50b8d40588d5e065d1d349ea639954d5be05a (patch) | |
tree | 3b7207fd15b9c261bc61a2ac4d41c0643af21695 /Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml | |
parent | f1ea970395618e73d9f9ba83d7cc7e7da0f91355 (diff) | |
download | linux-44f50b8d40588d5e065d1d349ea639954d5be05a.tar.xz |
dt-bindings: pwm: Convert imx tpm pwm to json-schema
Convert the imx tpm pwm binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml new file mode 100644 index 000000000000..fe9ef42544f1 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX TPM PWM controller + +maintainers: + - Anson Huang <anson.huang@nxp.com> + +description: | + The TPM counter and period counter are shared between multiple + channels, so all channels should use same period setting. + +properties: + "#pwm-cells": + const: 3 + + compatible: + enum: + - fsl,imx7ulp-pwm + + reg: + maxItems: 1 + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - "#pwm-cells" + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx7ulp-clock.h> + + pwm@40250000 { + compatible = "fsl,imx7ulp-pwm"; + reg = <0x40250000 0x1000>; + assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; + assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; + clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; + #pwm-cells = <3>; + }; |