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authorBenjamin Gaignard <benjamin.gaignard@linaro.org>2017-01-20 12:15:04 +0300
committerLee Jones <lee.jones@linaro.org>2017-01-23 15:04:24 +0300
commitcd9a99c2f8e890e84c593e393796b12ba7743128 (patch)
tree22d8781885773465db5e03ada050ff33caa70fdb /Documentation/devicetree/bindings/pwm
parentd0f949e220fdf5ed1033e9f6e80749b05f2e7b70 (diff)
downloadlinux-cd9a99c2f8e890e84c593e393796b12ba7743128.tar.xz
dt-bindings: pwm: Add STM32 bindings
Define bindings for pwm-stm32 version 9: - change commit message header version 8: - reword st,breakinput description. version 6: - change st,breakinput parameter format to make it usuable on stm32f7 too. version 2: - use parameters instead of compatible of handle the hardware configuration Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-stm32.txt35
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diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
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+++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
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+STMicroelectronics STM32 Timers PWM bindings
+
+Must be a sub-node of an STM32 Timers device tree node.
+See ../mfd/stm32-timers.txt for details about the parent node.
+
+Required parameters:
+- compatible: Must be "st,stm32-pwm".
+- pinctrl-names: Set to "default".
+- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
+ For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
+
+Optional parameters:
+- st,breakinput: One or two <index level filter> to describe break input configurations.
+ "index" indicates on which break input (0 or 1) the configuration
+ should be applied.
+ "level" gives the active level (0=low or 1=high) of the input signal
+ for this configuration.
+ "filter" gives the filtering value to be applied.
+
+Example:
+ timers@40010000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-timers";
+ reg = <0x40010000 0x400>;
+ clocks = <&rcc 0 160>;
+ clock-names = "clk_int";
+
+ pwm {
+ compatible = "st,stm32-pwm";
+ pinctrl-0 = <&pwm1_pins>;
+ pinctrl-names = "default";
+ st,breakinput = <0 1 5>;
+ };
+ };