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authorBrad Larson <blarson@amd.com>2023-04-10 21:45:15 +0300
committerMark Brown <broonie@kernel.org>2023-04-17 20:18:10 +0300
commit6282a6ceef62f5732082f691de8f82fcd49d4fb4 (patch)
tree9ca4c5746eeab601c528cf03a7c73718326d3859 /Documentation/devicetree/bindings/spi
parent6d87552c0b86b9677d762002082df5f5b7e3c33f (diff)
downloadlinux-6282a6ceef62f5732082f691de8f82fcd49d4fb4.tar.xz
spi: dw: Add AMD Pensando Elba SoC SPI Controller
The AMD Pensando Elba SoC has integrated the DW APB SPI Controller Signed-off-by: Brad Larson <blarson@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20230410184526.15990-5-blarson@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r--Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml19
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index a132b5fc56e0..12ca108864c6 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -37,6 +37,17 @@ allOf:
else:
required:
- interrupts
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: amd,pensando-elba-spi
+ then:
+ required:
+ - amd,pensando-elba-syscon
+ else:
+ properties:
+ amd,pensando-elba-syscon: false
properties:
compatible:
@@ -63,6 +74,8 @@ properties:
const: intel,keembay-ssi
- description: Intel Thunder Bay SPI Controller
const: intel,thunderbay-ssi
+ - description: AMD Pensando Elba SoC SPI Controller
+ const: amd,pensando-elba-spi
- description: Baikal-T1 SPI Controller
const: baikal,bt1-ssi
- description: Baikal-T1 System Boot SPI Controller
@@ -136,6 +149,12 @@ properties:
of the designware controller, and the upper limit is also subject to
controller configuration.
+ amd,pensando-elba-syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Block address to control SPI chip-selects. The Elba SoC system controller
+ provides an interface to override the native DWC SSI CS control.
+
patternProperties:
"^.*@[0-9a-f]+$":
type: object