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author | Mark Brown <broonie@kernel.org> | 2023-09-26 10:35:54 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2023-09-26 10:35:54 +0300 |
commit | da6de6d3ecc1ac37c36ed4c0c4ce5dcd410cddcf (patch) | |
tree | c748b702e792c38b1e84664cc305d0277ce4bbc4 /Documentation/devicetree/bindings/spi | |
parent | 8a771075e50bef5e2a063a9f954b36a33fb7359f (diff) | |
parent | ecdaa9473019f94e0ad6974a5f69b9be7de137d3 (diff) | |
download | linux-da6de6d3ecc1ac37c36ed4c0c4ce5dcd410cddcf.tar.xz |
spi: qup: Allow scaling power domains and
Merge series from Stephan Gerhold <stephan.gerhold@kernkonzept.com>:
Make it possible to scale performance states of the power domain and
interconnect of the SPI QUP controller in relation to the selected SPI
speed / core clock. This is done separately by:
- Parsing the OPP table from the device tree for performance state
votes of the power domain
- Voting for the necessary bandwidth on the interconnect path to DRAM
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r-- | Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml index 93f14dd01afc..88be13268962 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml @@ -44,9 +44,17 @@ properties: - const: tx - const: rx + interconnects: + maxItems: 1 + interrupts: maxItems: 1 + operating-points-v2: true + + power-domains: + maxItems: 1 + reg: maxItems: 1 @@ -62,7 +70,9 @@ unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-msm8996.h> + #include <dt-bindings/interconnect/qcom,msm8996.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> spi@7575000 { compatible = "qcom,spi-qup-v2.2.1"; @@ -76,6 +86,9 @@ examples: pinctrl-1 = <&blsp1_spi1_sleep>; dmas = <&blsp1_dma 12>, <&blsp1_dma 13>; dma-names = "tx", "rx"; + power-domains = <&rpmpd MSM8996_VDDCX>; + operating-points-v2 = <&spi_opp_table>; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; #address-cells = <1>; #size-cells = <0>; }; |