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author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2022-11-17 13:52:42 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2022-11-18 14:57:08 +0300 |
commit | f6c911f3308c1cfb97ae1da6654080d7104e2df2 (patch) | |
tree | 671233de9665df55399eecf2b667110d3b91dfe0 /Documentation/devicetree/bindings/spi | |
parent | 84b60f2bce1f0416617c4dbc015b5da906b8e2ad (diff) | |
download | linux-f6c911f3308c1cfb97ae1da6654080d7104e2df2.tar.xz |
spi: dt-bindings: Introduce spi-cs-setup-ns property
SPI NOR flashes have specific cs-setup time requirements without which
they can't work at frequencies close to their maximum supported frequency,
as they miss the first bits of the instruction command. Unrecognized
commands are ignored, thus the flash will be unresponsive. Introduce the
spi-cs-setup-ns property to allow spi devices to specify their cs setup
time.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20221117105249.115649-2-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index dca677f9e1b9..ead2cccf658f 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -44,6 +44,11 @@ properties: description: Maximum SPI clocking speed of the device in Hz. + spi-cs-setup-ns: + description: + Delay in nanosecods to be introduced by the controller after CS is + asserted. + spi-rx-bus-width: description: Bus width to the SPI bus used for read transfers. |