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| author | Marek Vasut <marex@denx.de> | 2022-12-02 19:23:49 +0300 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@kernel.org> | 2022-12-14 17:25:40 +0300 |
| commit | 8848c0d7a0782c263a7827697d5acfcc09a19a5f (patch) | |
| tree | b0c76460aefa2b05f53b0c3181c0b0d08d3769a4 /Documentation/devicetree/bindings/thermal | |
| parent | 89992d95ed1046338c7866ef7bbe6de543a2af91 (diff) | |
| download | linux-8848c0d7a0782c263a7827697d5acfcc09a19a5f.tar.xz | |
dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells
The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values from OCOTP. Document optional phandle to OCOTP nvmem
provider.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/thermal')
| -rw-r--r-- | Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml index 89c54e08ee61..b90726229ac9 100644 --- a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml @@ -32,6 +32,13 @@ properties: clocks: maxItems: 1 + nvmem-cells: + maxItems: 1 + description: Phandle to the calibration data provided by ocotp + + nvmem-cell-names: + const: calib + "#thermal-sensor-cells": description: | Number of cells required to uniquely identify the thermal |