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author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-05-14 23:19:15 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-05-14 23:19:15 +0300 |
commit | 0c181b1d97dc4deaa902da46740e412c0d0bf9fb (patch) | |
tree | c90a951c11520931d4dee3bdd55b4a0023477757 /Documentation/devicetree/bindings | |
parent | f952b6c863090464c148066df9f46cb3edd603da (diff) | |
parent | de1c2722e07819c7ea65bb4bf37a2cfe2556095b (diff) | |
download | linux-0c181b1d97dc4deaa902da46740e412c0d0bf9fb.tar.xz |
Merge tag 'pm-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki:
"These are mostly cpufreq updates, including a significant intel-pstate
driver update and several amd-pstate improvements plus some updates of
ARM cpufreq drivers, general fixes and cleanups.
Also included are changes related to system sleep, power capping
updates adding support for a new platform and a new hardware feature
(among other things), a Samsung exynos-asv driver update allowing it
to change its Energy Model after adjusting voltage, minor cpuidle and
devfreq updates and a small documentation cleanup.
Specifics:
- Rework the handling of disabled turbo in the intel_pstate driver
and make it update the maximum CPU frequency consistently
regardless of the reason on top of a number of cleanups (Rafael
Wysocki)
- Add missing checks for NULL .exit() cpufreq driver callback to the
cpufreq core (Viresh Kumar)
- Prevent pulicy->max from going above the frequency QoS maximum
value when cpufreq_frequency_table_verify() is used (Xuewen Yan)
- Prevent a negative CPU number or frequency value from being printed
if they are really large (Joshua Yeong)
- Update MAINTAINERS entry for amd-pstate to add two new
submaintainers and a designated reviewer (Huang Rui)
- Clean up the amd-pstate driver and update its documentation
(Gautham Shenoy)
- Fix the highest frequency issue in the amd-pstate driver which
limits performance (Perry Yuan)
- Enable CPPC v2 for certain processors in the family 17H, as
requested by TR40 processor users who expect improved performance
and lower system temperature (Perry Yuan)
- Change latency and delay values to be read from platform firmware
firstly for more accurate timing (Perry Yuan)
- A new quirk is introduced for supporting amd-pstate on legacy
processors which either lack CPPC capability, or only only have
CPPC v2 capability (Perry Yuan)
- Sun50i cpufreq: Add support for opp_supported_hw, H616 platform and
general cleanups (Andre Przywara, Martin Botka, Brandon Cheo Fusi,
Dan Carpenter, Viresh Kumar)
- CPPC cpufreq: Fix possible null pointer dereference (Aleksandr
Mishin)
- Eliminate uses of of_node_put() from cpufreq (Javier Carrasco,
Shivani Gupta)
- brcmstb-avs: ISO C90 forbids mixed declarations (Portia Stephens)
- mediatek cpufreq: Add support for MT7988A (Sam Shih)
- cpufreq-qcom-hw: Add SM4450 compatibles in DT bindings (Tengfei
Fan)
- Fix struct cpudata::epp_cached kernel-doc in the intel_pstate
cpufreq driver (Jeff Johnson)
- Fix kerneldoc description of ladder_do_selection() (Jeff Johnson)
- Convert the cpuidle kirkwood driver to platform remove callback
returning void (Yangtao Li)
- Replace deprecated strncpy() with strscpy() in the hibernation core
code (Justin Stitt)
- Use %ps to simplify debug output in the core system-wide suspend
and resume code (Len Brown)
- Remove unnecessary else from device_init_wakeup() and make
device_wakeup_disable() return void (Dhruva Gole)
- Enable PMU support in the Intel TPMI RAPL driver (Zhang Rui)
- Add support for ArrowLake-H platform to the Intel RAPL driver
(Zhang Rui)
- Avoid explicit cpumask allocation on stack in DTPM (Dawei Li)
- Make the Samsung exynos-asv driver update the Energy Model after
adjusting voltage on top of some preliminary changes of the OPP and
Enery Model generic code (Lukasz Luba)
- Remove a reference to a function that has been dropped from the
power management documentation (Bjorn Helgaas)
- Convert the platfrom remove callback to .remove_new for the
exyno-nocp, exynos-ppmu, mtk-cci-devfreq, sun8i-a33-mbus, and
rk3399_dmc devfreq drivers (Uwe Kleine-König)
- Use DEFINE_SIMPLE_PM_OPS for exyno-bus.c driver (Anand Moon)"
* tag 'pm-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (68 commits)
PM / devfreq: exynos: Use DEFINE_SIMPLE_DEV_PM_OPS for PM functions
PM / devfreq: rk3399_dmc: Convert to platform remove callback returning void
PM / devfreq: sun8i-a33-mbus: Convert to platform remove callback returning void
PM / devfreq: mtk-cci: Convert to platform remove callback returning void
PM / devfreq: exynos-ppmu: Convert to platform remove callback returning void
PM / devfreq: exynos-nocp: Convert to platform remove callback returning void
cpufreq: amd-pstate: fix the highest frequency issue which limits performance
cpufreq: intel_pstate: fix struct cpudata::epp_cached kernel-doc
cpuidle: ladder: fix ladder_do_selection() kernel-doc
powercap: intel_rapl_tpmi: Enable PMU support
powercap: intel_rapl: Introduce APIs for PMU support
PM: hibernate: replace deprecated strncpy() with strscpy()
cpufreq: Fix up printing large CPU numbers and frequency values
MAINTAINERS: cpufreq: amd-pstate: Add co-maintainers and reviewer
cpufreq: amd-pstate: remove unused variable lowest_nonlinear_freq
cpufreq: amd-pstate: fix code format problems
cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missing
cppc_acpi: print error message if CPPC is unsupported
cpufreq: amd-pstate: get transition delay and latency value from ACPI tables
cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0
...
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r-- | Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 2 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml | 87 |
2 files changed, 45 insertions, 44 deletions
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index 56fc71d6a081..1e9797f96410 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -38,6 +38,7 @@ properties: - qcom,sc7280-cpufreq-epss - qcom,sc8280xp-cpufreq-epss - qcom,sdx75-cpufreq-epss + - qcom,sm4450-cpufreq-epss - qcom,sm6375-cpufreq-epss - qcom,sm8250-cpufreq-epss - qcom,sm8350-cpufreq-epss @@ -133,6 +134,7 @@ allOf: - qcom,sc8280xp-cpufreq-epss - qcom,sdm670-cpufreq-hw - qcom,sdm845-cpufreq-hw + - qcom,sm4450-cpufreq-epss - qcom,sm6115-cpufreq-hw - qcom,sm6350-cpufreq-hw - qcom,sm6375-cpufreq-epss diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml index 51f62c3ae194..ec5e424bb3c8 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml @@ -13,25 +13,25 @@ maintainers: description: | For some SoCs, the CPU frequency subset and voltage value of each OPP varies based on the silicon variant in use. Allwinner Process - Voltage Scaling Tables defines the voltage and frequency value based - on the speedbin blown in the efuse combination. The - sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to - provide the OPP framework with required information. + Voltage Scaling Tables define the voltage and frequency values based + on the speedbin blown in the efuse combination. allOf: - $ref: opp-v2-base.yaml# properties: compatible: - const: allwinner,sun50i-h6-operating-points + enum: + - allwinner,sun50i-h6-operating-points + - allwinner,sun50i-h616-operating-points nvmem-cells: description: | A phandle pointing to a nvmem-cells node representing the efuse - registers that has information about the speedbin that is used + register that has information about the speedbin that is used to select the right frequency/voltage value pair. Please refer - the for nvmem-cells bindings - Documentation/devicetree/bindings/nvmem/nvmem.txt and also + to the nvmem-cells bindings in + Documentation/devicetree/bindings/nvmem/nvmem.yaml and also the examples below. opp-shared: true @@ -47,15 +47,18 @@ patternProperties: properties: opp-hz: true clock-latency-ns: true + opp-microvolt: true + opp-supported-hw: + maxItems: 1 + description: + A single 32 bit bitmap value, representing compatible HW, one + bit per speed bin index. patternProperties: "^opp-microvolt-speed[0-9]$": true required: - opp-hz - - opp-microvolt-speed0 - - opp-microvolt-speed1 - - opp-microvolt-speed2 unevaluatedProperties: false @@ -77,58 +80,54 @@ examples: opp-microvolt-speed2 = <800000>; }; - opp-720000000 { + opp-1080000000 { clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <720000000>; + opp-hz = /bits/ 64 <1080000000>; - opp-microvolt-speed0 = <880000>; - opp-microvolt-speed1 = <820000>; - opp-microvolt-speed2 = <800000>; + opp-microvolt-speed0 = <1060000>; + opp-microvolt-speed1 = <880000>; + opp-microvolt-speed2 = <840000>; }; - opp-816000000 { + opp-1488000000 { clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <816000000>; + opp-hz = /bits/ 64 <1488000000>; - opp-microvolt-speed0 = <880000>; - opp-microvolt-speed1 = <820000>; - opp-microvolt-speed2 = <800000>; + opp-microvolt-speed0 = <1160000>; + opp-microvolt-speed1 = <1000000>; + opp-microvolt-speed2 = <960000>; }; + }; - opp-888000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <888000000>; - - opp-microvolt-speed0 = <940000>; - opp-microvolt-speed1 = <820000>; - opp-microvolt-speed2 = <800000>; - }; + - | + opp-table { + compatible = "allwinner,sun50i-h616-operating-points"; + nvmem-cells = <&speedbin_efuse>; + opp-shared; - opp-1080000000 { + opp-480000000 { clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1080000000>; + opp-hz = /bits/ 64 <480000000>; - opp-microvolt-speed0 = <1060000>; - opp-microvolt-speed1 = <880000>; - opp-microvolt-speed2 = <840000>; + opp-microvolt = <900000>; + opp-supported-hw = <0x1f>; }; - opp-1320000000 { + opp-792000000 { clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1320000000>; + opp-hz = /bits/ 64 <792000000>; - opp-microvolt-speed0 = <1160000>; - opp-microvolt-speed1 = <940000>; - opp-microvolt-speed2 = <900000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed4 = <940000>; + opp-supported-hw = <0x12>; }; - opp-1488000000 { + opp-1512000000 { clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1488000000>; + opp-hz = /bits/ 64 <1512000000>; - opp-microvolt-speed0 = <1160000>; - opp-microvolt-speed1 = <1000000>; - opp-microvolt-speed2 = <960000>; + opp-microvolt = <1100000>; + opp-supported-hw = <0x0a>; }; }; |