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author | Stephen Boyd <sboyd@kernel.org> | 2021-04-28 02:34:56 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2021-04-28 02:34:56 +0300 |
commit | 3ba2d41dca14e1afbea0c41ba8164064df407c8b (patch) | |
tree | 9952ff280826db3fcaf657b19579232d72021039 /Documentation/devicetree | |
parent | bbc3b403b096220850b82e245a1e5f09b8b216a2 (diff) | |
parent | 0ec3815a8c1d8fe7215b1748117ac14cbeeda453 (diff) | |
download | linux-3ba2d41dca14e1afbea0c41ba8164064df407c8b.tar.xz |
Merge branch 'clk-ralink' into clk-next
- Proper clk driver for Mediatek MT7621 SoCs
* clk-ralink:
MAINTAINERS: add MT7621 CLOCK maintainer
staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'
staging: mt7621-dts: make use of new 'mt7621-clk'
clk: ralink: add clock driver for mt7621 SoC
dt: bindings: add mt7621-sysc device tree binding documentation
dt-bindings: clock: add dt binding header for mt7621 clocks
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml new file mode 100644 index 000000000000..915f84efd763 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MT7621 Clock Device Tree Bindings + +maintainers: + - Sergio Paracuellos <sergio.paracuellos@gmail.com> + +description: | + The MT7621 has a PLL controller from where the cpu clock is provided + as well as derived clocks for the bus and the peripherals. It also + can gate SoC device clocks. + + Each clock is assigned an identifier and client nodes use this identifier + to specify the clock which they consume. + + All these identifiers could be found in: + [1]: <include/dt-bindings/clock/mt7621-clk.h>. + + The clocks are provided inside a system controller node. + +properties: + compatible: + items: + - const: mediatek,mt7621-sysc + - const: syscon + + reg: + maxItems: 1 + + "#clock-cells": + description: + The first cell indicates the clock number, see [1] for available + clocks. + const: 1 + + ralink,memctl: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle of syscon used to control memory registers + + clock-output-names: + maxItems: 8 + +required: + - compatible + - reg + - '#clock-cells' + - ralink,memctl + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt7621-clk.h> + + sysc: sysc@0 { + compatible = "mediatek,mt7621-sysc", "syscon"; + reg = <0x0 0x100>; + #clock-cells = <1>; + ralink,memctl = <&memc>; + clock-output-names = "xtal", "cpu", "bus", + "50m", "125m", "150m", + "250m", "270m"; + }; |