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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-02-20 21:15:22 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-02-20 21:15:22 +0300 |
| commit | a0c85e96d3b5609c918edd5a534a7cde9845b3fa (patch) | |
| tree | 696c9adb92f73bde9f50e52fe315a868c2801cd8 /Documentation/hwmon/jc42 | |
| parent | e58713724059da7d2982d6ad945192c8fca5b729 (diff) | |
| parent | f065a93e168299569078bc6f52128b57f602fff3 (diff) | |
| download | linux-a0c85e96d3b5609c918edd5a534a7cde9845b3fa.tar.xz | |
Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging
* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging:
hwmon: (lm85) extend to support EMC6D103 chips
MAINTAINERS: Remove stale hwmon quilt tree
hwmon: (k10temp) add support for AMD Family 12h/14h CPUs
hwmon: (jc42) do not allow writing to locked registers
hwmon: (jc42) more helpful documentation
hwmon: (jc42) fix type mismatch
Diffstat (limited to 'Documentation/hwmon/jc42')
| -rw-r--r-- | Documentation/hwmon/jc42 | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/Documentation/hwmon/jc42 b/Documentation/hwmon/jc42 index 0e76ef12e4c6..a22ecf48f255 100644 --- a/Documentation/hwmon/jc42 +++ b/Documentation/hwmon/jc42 @@ -51,7 +51,8 @@ Supported chips: * JEDEC JC 42.4 compliant temperature sensor chips Prefix: 'jc42' Addresses scanned: I2C 0x18 - 0x1f - Datasheet: - + Datasheet: + http://www.jedec.org/sites/default/files/docs/4_01_04R19.pdf Author: Guenter Roeck <guenter.roeck@ericsson.com> @@ -60,7 +61,11 @@ Author: Description ----------- -This driver implements support for JEDEC JC 42.4 compliant temperature sensors. +This driver implements support for JEDEC JC 42.4 compliant temperature sensors, +which are used on many DDR3 memory modules for mobile devices and servers. Some +systems use the sensor to prevent memory overheating by automatically throttling +the memory controller. + The driver auto-detects the chips listed above, but can be manually instantiated to support other JC 42.4 compliant chips. @@ -81,15 +86,19 @@ limits. The chip supports only a single register to configure the hysteresis, which applies to all limits. This register can be written by writing into temp1_crit_hyst. Other hysteresis attributes are read-only. +If the BIOS has configured the sensor for automatic temperature management, it +is likely that it has locked the registers, i.e., that the temperature limits +cannot be changed. + Sysfs entries ------------- temp1_input Temperature (RO) -temp1_min Minimum temperature (RW) -temp1_max Maximum temperature (RW) -temp1_crit Critical high temperature (RW) +temp1_min Minimum temperature (RO or RW) +temp1_max Maximum temperature (RO or RW) +temp1_crit Critical high temperature (RO or RW) -temp1_crit_hyst Critical hysteresis temperature (RW) +temp1_crit_hyst Critical hysteresis temperature (RO or RW) temp1_max_hyst Maximum hysteresis temperature (RO) temp1_min_alarm Temperature low alarm |