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authorOleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com>2013-06-03 11:37:20 +0400
committerWolfram Sang <wsa@the-dreams.de>2013-06-19 14:04:26 +0400
commit4368de19ed3f67168d714ab34b5b27c6a0ebad4e (patch)
tree22a1be02632584787c5dec436758a8ff0a5d1751 /Documentation/i2c
parent7a10f4732972b48f75a547a42f9cdfef340124a6 (diff)
downloadlinux-4368de19ed3f67168d714ab34b5b27c6a0ebad4e.tar.xz
i2c: omap: correct usage of the interrupt enable register
We've been lucky not to have any interrupts fire during the suspend path, otherwise we would have unpredictable behaviour in the kernel. Based on the logic of the kernel code interrupts from i2c should be prohibited during suspend. Kernel writes 0 to the I2C_IE register in the omap_i2c_runtime_suspend() function. In the other side kernel writes saved interrupt flags to the I2C_IE register in omap_i2c_runtime_resume() function. I.e. interrupts should be disabled during suspend. This works for chips with version1 registers scheme. Interrupts are disabled during suspend. For chips with version2 scheme registers writting 0 to the I2C_IE register does nothing (because now the I2C_IRQENABLE_SET register is located at this address). This register is used to enable interrupts. For disabling interrupts I2C_IRQENABLE_CLR register should be used. Because the registers I2C_IRQENABLE_SET and I2C_IE have the same addresses, the interrupt enabling procedure is unchanged. I've checked that interrupts in the i2c controller are still enabled after writting 0 to the I2C_IRQENABLE_SET register. With this patch interrupts are disabled in the omap_i2c_runtime_suspend() function. Patch is based on: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git tag: v3.10-rc2 Verified on OMAP4430. Signed-off-by: Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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