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author | Bjorn Helgaas <bhelgaas@google.com> | 2023-08-15 00:28:22 +0300 |
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committer | Jonathan Corbet <corbet@lwn.net> | 2023-08-18 20:29:03 +0300 |
commit | d56b699d76d1b352f7a3d3a0a3e91c79b8612d94 (patch) | |
tree | 2a368f3e2e17f7a516bf39e055f79d8c79a74885 /Documentation/riscv/hwprobe.rst | |
parent | ebab9426cd73c45945b44344ca904b343f0ca070 (diff) | |
download | linux-d56b699d76d1b352f7a3d3a0a3e91c79b8612d94.tar.xz |
Documentation: Fix typos
Fix typos in Documentation.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20230814212822.193684-4-helgaas@kernel.org
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/riscv/hwprobe.rst')
-rw-r--r-- | Documentation/riscv/hwprobe.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/riscv/hwprobe.rst b/Documentation/riscv/hwprobe.rst index 19165ebd82ba..67111304ae5f 100644 --- a/Documentation/riscv/hwprobe.rst +++ b/Documentation/riscv/hwprobe.rst @@ -88,11 +88,11 @@ The following keys are defined: always extremely slow. * :c:macro:`RISCV_HWPROBE_MISALIGNED_SLOW`: Misaligned accesses are supported - in hardware, but are slower than the cooresponding aligned accesses + in hardware, but are slower than the corresponding aligned accesses sequences. * :c:macro:`RISCV_HWPROBE_MISALIGNED_FAST`: Misaligned accesses are supported - in hardware and are faster than the cooresponding aligned accesses + in hardware and are faster than the corresponding aligned accesses sequences. * :c:macro:`RISCV_HWPROBE_MISALIGNED_UNSUPPORTED`: Misaligned accesses are |