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| author | Takahiro Kuwano <Takahiro.Kuwano@infineon.com> | 2024-02-20 11:34:09 +0300 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@linaro.org> | 2024-02-26 14:29:09 +0300 |
| commit | 6a9eda34418fc4dc05c2a7d6741c475e287d418c (patch) | |
| tree | 7f2c878b3b1ad22a81919afe8790fbc1981981d8 /Documentation | |
| parent | 2865ed0e2c718387457b30a293fe46333694168f (diff) | |
| download | linux-6a9eda34418fc4dc05c2a7d6741c475e287d418c.tar.xz | |
mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase map
Some of Infineon SPI NOR flash devices support hybrid sector layout that
overlays 4KB sectors on a 256KB sector and SPI NOR framework recognizes
that by parsing SMPT and construct params->erase_map. The hybrid sector
layout is similar to CFI flash devices that have small sectors on top
and/or bottom address. In case of CFI flash devices, the erase map
information is parsed through CFI table and populated into
mtd->eraseregions so that users can create MTD partitions that aligned
with small sector boundaries. This patch provides the same capability to
SPI NOR flash devices that have non-uniform erase map.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/35d0962986e493b06c13bdf7ada8130a9966dc02.1708404584.git.Takahiro.Kuwano@infineon.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions