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| author | Sean Anderson <sean.anderson@seco.com> | 2022-04-29 19:26:57 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-05-09 16:46:29 +0300 |
| commit | 8cb0cd68bef75af5ac8ef93f3314d4f8dc8767a3 (patch) | |
| tree | 12def4a87932d61574b584dc527b81d2d9556c82 /Documentation | |
| parent | c75945ac2e503375a5fcd44684a5243df07a6158 (diff) | |
| download | linux-8cb0cd68bef75af5ac8ef93f3314d4f8dc8767a3.tar.xz | |
dt-bindings: nvmem: sfp: Add clock properties
To program fuses, it is necessary to set the fuse programming time. This
is determined based on the value of the platform clock. Add a clock
property.
Because this property is necessary for programming, it is made
mandatory. Since these bindings have not yet been present in a stable
release (though they are on track for 5.18), it is not an ABI break to
change them in this manner.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220429162701.2222-13-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml index b7798e903191..54086f50157d 100644 --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml @@ -24,15 +24,29 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + description: + The SFP clock. Typically, this is the platform clock divided by 4. + + clock-names: + const: sfp + required: - compatible - reg + - clock-names + - clocks unevaluatedProperties: false examples: - | + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> efuse@1e80000 { compatible = "fsl,ls1028a-sfp"; reg = <0x1e80000 0x8000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; }; |