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| author | Hal Feng <hal.feng@starfivetech.com> | 2023-04-01 14:19:30 +0300 |
|---|---|---|
| committer | Minda Chen <minda.chen@starfivetech.com> | 2024-01-11 13:50:52 +0300 |
| commit | ac80c75ededbc94c0241d7918e4253efed2ea873 (patch) | |
| tree | 489a4cf58283221f5763729aad2575a14ee155a2 /Documentation | |
| parent | 299ae43411257ffd9fb1ef2117a608a3f511976e (diff) | |
| download | linux-ac80c75ededbc94c0241d7918e4253efed2ea873.tar.xz | |
dt-bindings: riscv: Add SiFive S7 compatible
Add a new compatible string in cpu.yaml for SiFive S7 CPU
core which is used on SiFive U74-MC core complex etc.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/riscv/cpus.yaml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index d4148418350c..3c9f30bc406f 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -33,6 +33,7 @@ properties: - sifive,e5 - sifive,e7 - sifive,e71 + - sifive,s7 - sifive,u74-mc - sifive,u54 - sifive,u74 |