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| author | Vineet Gupta <vgupta@kernel.org> | 2020-01-13 20:16:06 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@kernel.org> | 2021-08-25 00:25:48 +0300 |
| commit | 6128df5be48f48d63efdc7c52022dd163f612373 (patch) | |
| tree | 8d740e544f2125984b51b048e15042d226f9c995 /arch/arc/mm/tlbex.S | |
| parent | 288ff7de62af0936353c9394de9d0b2c6dd22c80 (diff) | |
| download | linux-6128df5be48f48d63efdc7c52022dd163f612373.tar.xz | |
ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only
MMU SCRATCH_DATA0 register is intended to cache task pgd. However in
ARC700 SMP port, it has to be repurposed for re-entrant interrupt
handling, while UP port doesn't. We currently handle these use-cases
using a fabricated #define which has usual issues of dependency nesting
and obvious ugliness.
So clean this up: for ARC700 don't use to cache pgd (even in UP) and do
the opposite for ARCv2.
And while here, switch to canonical pgd_offset().
Acked-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
Diffstat (limited to 'arch/arc/mm/tlbex.S')
| -rw-r--r-- | arch/arc/mm/tlbex.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index 96c3a5de9dd4..bcd2909c691f 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S @@ -202,7 +202,7 @@ ex_saved_reg1: lr r2, [efa] -#ifdef ARC_USE_SCRATCH_REG +#ifdef CONFIG_ISA_ARCV2 lr r1, [ARC_REG_SCRATCH_DATA0] ; current pgd #else GET_CURR_TASK_ON_CPU r1 |