diff options
author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-07-30 14:15:41 +0300 |
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committer | Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2023-08-02 07:44:24 +0300 |
commit | dc1890b95e5088fa267dea9cadc20f833b961e29 (patch) | |
tree | e8ac5f206a456cc31d9867cede4b5b16af019315 /arch/arm/boot/dts/microchip/at91sam9260.dtsi | |
parent | 58f45c50c36cc96cbb973bf316ad08f2c9895c3c (diff) | |
download | linux-dc1890b95e5088fa267dea9cadc20f833b961e29.tar.xz |
ARM: dts: microchip: split interrupts per cells
Each interrupt should be in its own cell. This is much more readable.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'arch/arm/boot/dts/microchip/at91sam9260.dtsi')
-rw-r--r-- | arch/arm/boot/dts/microchip/at91sam9260.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/microchip/at91sam9260.dtsi b/arch/arm/boot/dts/microchip/at91sam9260.dtsi index 27b4a21f13c1..e56d5546554c 100644 --- a/arch/arm/boot/dts/microchip/at91sam9260.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9260.dtsi @@ -148,9 +148,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffa0000 0x100>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 - 18 IRQ_TYPE_LEVEL_HIGH 0 - 19 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, + <18 IRQ_TYPE_LEVEL_HIGH 0>, + <19 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -160,9 +160,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffdc000 0x100>; - interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 - 27 IRQ_TYPE_LEVEL_HIGH 0 - 28 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>, + <27 IRQ_TYPE_LEVEL_HIGH 0>, + <28 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; |