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authorTony Lindgren <tony@atomide.com>2024-03-27 10:10:37 +0300
committerTony Lindgren <tony@atomide.com>2024-04-10 09:15:46 +0300
commit8d0cd4fe16eca187017d1a192095d75b4fc21ad2 (patch)
tree9f1caad10f501b00a7224648fd5313bc65b65650 /arch/arm/boot/dts/ti
parent99a27be0caac26013e23ed64012cb7098f9cc401 (diff)
downloadlinux-8d0cd4fe16eca187017d1a192095d75b4fc21ad2.tar.xz
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_EVE
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/ti')
-rw-r--r--arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi22
1 files changed, 15 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
index 0385535c8bc7..e021632a18ef 100644
--- a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
@@ -666,13 +666,21 @@
clock-div = <1>;
};
- dpll_eve_byp_mux: clock-dpll-eve-byp-mux-23@290 {
- #clock-cells = <0>;
- compatible = "ti,mux-clock";
- clock-output-names = "dpll_eve_byp_mux";
- clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
- ti,bit-shift = <23>;
- reg = <0x0290>;
+ /* CM_CLKSEL_DPLL_EVE */
+ clock@290 {
+ compatible = "ti,clksel";
+ reg = <0x290>;
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dpll_eve_byp_mux: clock@23 {
+ reg = <23>;
+ compatible = "ti,mux-clock";
+ clock-output-names = "dpll_eve_byp_mux";
+ clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
+ #clock-cells = <0>;
+ };
};
dpll_eve_ck: clock@284 {