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author | Stephen Boyd <sboyd@codeaurora.org> | 2018-08-14 15:12:20 +0300 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2018-10-17 23:14:33 +0300 |
commit | 36d68f64c411e09788687d5919886aadeb92adca (patch) | |
tree | 4f7f19217073c5fa8804358c7bbb8d1407b35c0b /arch/arm/common/Makefile | |
parent | 5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff) | |
download | linux-36d68f64c411e09788687d5919886aadeb92adca.tar.xz |
ARM: Add Krait L2 register accessor functions
Krait CPUs have a handful of L2 cache controller registers that
live behind a cp15 based indirection register. First you program
the indirection register (l2cpselr) to point the L2 'window'
register (l2cpdr) at what you want to read/write. Then you
read/write the 'window' register to do what you want. The
l2cpselr register is not banked per-cpu so we must lock around
accesses to it to prevent other CPUs from re-pointing l2cpdr
underneath us.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'arch/arm/common/Makefile')
-rw-r--r-- | arch/arm/common/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 3157be413297..219a260bbe5f 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -7,6 +7,7 @@ obj-y += firmware.o obj-$(CONFIG_SA1111) += sa1111.o obj-$(CONFIG_DMABOUNCE) += dmabounce.o +obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o obj-$(CONFIG_SHARP_LOCOMO) += locomo.o obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o obj-$(CONFIG_SHARP_SCOOP) += scoop.o |