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author | Jeremy J. Peper <jeremy@jeremypeper.com> | 2023-03-17 18:43:46 +0300 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2023-04-18 18:04:28 +0300 |
commit | 4b01f735a619ae535d4459aec3b070c9336e56b4 (patch) | |
tree | f6daa4d1d09f90d334ca60dac0a106710681edd3 /arch/arm/mach-mv78xx0/common.c | |
parent | 189e3ddb64cca682fc13a0f3d7216a1314a7975d (diff) | |
download | linux-4b01f735a619ae535d4459aec3b070c9336e56b4.tar.xz |
ARM: mv78xx0: add code to enable XOR and CRYPTO engines on mv78xx0
Adding missing code/values required to enable the XOR and CESA engines for this SoC
Signed-off-by: Jeremy J. Peper <jeremy@jeremypeper.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mv78xx0/common.c')
-rw-r--r-- | arch/arm/mach-mv78xx0/common.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 461a68945c26..679753fcc0ef 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -342,6 +342,29 @@ void __ref mv78xx0_timer_init(void) IRQ_MV78XX0_TIMER_1, get_tclk()); } +/**************************************************************************** +* XOR engine +****************************************************************************/ +void __init mv78xx0_xor_init(void) +{ + orion_xor0_init(XOR_PHYS_BASE, + XOR_PHYS_BASE + 0x200, + IRQ_MV78XX0_XOR_0, IRQ_MV78XX0_XOR_1); +} + +/**************************************************************************** + * Cryptographic Engines and Security Accelerator (CESA) +****************************************************************************/ +void __init mv78xx0_crypto_init(void) +{ + mvebu_mbus_add_window_by_id(MV78XX0_MBUS_SRAM_TARGET, + MV78XX0_MBUS_SRAM_ATTR, + MV78XX0_SRAM_PHYS_BASE, + MV78XX0_SRAM_SIZE); + orion_crypto_init(CRYPTO_PHYS_BASE, MV78XX0_SRAM_PHYS_BASE, + SZ_8K, IRQ_MV78XX0_CRYPTO); +} + /***************************************************************************** * General |