diff options
author | Peter Chiu <chui-hao.chiu@mediatek.com> | 2022-09-01 16:05:52 +0300 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2022-09-14 17:17:00 +0300 |
commit | 300218b0503d40f3efc69363ca70b7f75c3ba81f (patch) | |
tree | ac0904b83bf047e42b7a18ddb939245d2b91e774 /arch/arm64/boot/dts/mediatek/mt7986a.dtsi | |
parent | 260c04d425eb8424626b64e164faebeb63c67625 (diff) | |
download | linux-300218b0503d40f3efc69363ca70b7f75c3ba81f.tar.xz |
arm64: dts: mt7986: add built-in Wi-Fi device nodes
This enables built-in 802.11ax Wi-Fi support.
Reviewed-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
Link: https://lore.kernel.org/r/20220901130552.26234-1-chui-hao.chiu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt7986a.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index e3a407d03551..890ded0efc51 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mt7986-clk.h> +#include <dt-bindings/reset/mt7986-resets.h> / { interrupt-parent = <&gic>; @@ -70,6 +71,11 @@ reg = <0 0x43000000 0 0x30000>; no-map; }; + + wmcpu_emi: wmcpu-reserved@4fc00000 { + no-map; + reg = <0 0x4fc00000 0 0x00100000>; + }; }; timer { @@ -261,6 +267,23 @@ #size-cells = <0>; status = "disabled"; }; + + wifi: wifi@18000000 { + compatible = "mediatek,mt7986-wmac"; + resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>; + reset-names = "consys"; + clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>, + <&topckgen CLK_TOP_AP2CNN_HOST_SEL>; + clock-names = "mcu", "ap2conn"; + reg = <0 0x18000000 0 0x1000000>, + <0 0x10003000 0 0x1000>, + <0 0x11d10000 0 0x1000>; + interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; + memory-region = <&wmcpu_emi>; + }; }; }; |