diff options
author | Marc Zyngier <maz@kernel.org> | 2023-08-15 21:38:44 +0300 |
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committer | Marc Zyngier <maz@kernel.org> | 2023-08-17 12:00:27 +0300 |
commit | 484f86824a3d94c6d9412618dd70b1d5923fff6f (patch) | |
tree | 5d1313be0a188916d30ac451183f900fef7405be /arch/arm64/include/asm/sysreg.h | |
parent | b206a708cbfb352f2191089678ab595d24563011 (diff) | |
download | linux-484f86824a3d94c6d9412618dd70b1d5923fff6f.tar.xz |
KVM: arm64: Correctly handle ACCDATA_EL1 traps
As we blindly reset some HFGxTR_EL2 bits to 0, we also randomly trap
unsuspecting sysregs that have their trap bits with a negative
polarity.
ACCDATA_EL1 is one such register that can be accessed by the guest,
causing a splat on the host as we don't have a proper handler for
it.
Adding such handler addresses the issue, though there are a number
of other registers missing as the current architecture documentation
doesn't describe them yet.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Miguel Luis <miguel.luis@oracle.com>
Reviewed-by: Jing Zhang <jingzhangos@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230815183903.2735724-11-maz@kernel.org
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
-rw-r--r-- | arch/arm64/include/asm/sysreg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 043c677e9f04..818c111009ca 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -387,6 +387,8 @@ #define SYS_ICC_IGRPEN0_EL1 sys_reg(3, 0, 12, 12, 6) #define SYS_ICC_IGRPEN1_EL1 sys_reg(3, 0, 12, 12, 7) +#define SYS_ACCDATA_EL1 sys_reg(3, 0, 13, 0, 5) + #define SYS_CNTKCTL_EL1 sys_reg(3, 0, 14, 1, 0) #define SYS_AIDR_EL1 sys_reg(3, 1, 0, 0, 7) |