diff options
| author | David Brazdil <dbrazdil@google.com> | 2020-12-02 21:41:12 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-12-04 13:08:34 +0300 |
| commit | eeeee7193df015074c8302381356e8e617a5e2b0 (patch) | |
| tree | f95c9cfefa430270e54dbe1717b91ff913e82dda /arch/arm64/kvm/hyp/nvhe/hyp-main.c | |
| parent | a805e1fb30990e29b3174c39bf39015065e5dc19 (diff) | |
| download | linux-eeeee7193df015074c8302381356e8e617a5e2b0.tar.xz | |
KVM: arm64: Bootstrap PSCI SMC handler in nVHE EL2
Add a handler of PSCI SMCs in nVHE hyp code. The handler is initialized
with the version used by the host's PSCI driver and the function IDs it
was configured with. If the SMC function ID matches one of the
configured PSCI calls (for v0.1) or falls into the PSCI function ID
range (for v0.2+), the SMC is handled by the PSCI handler. For now, all
SMCs return PSCI_RET_NOT_SUPPORTED.
Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201202184122.26046-17-dbrazdil@google.com
Diffstat (limited to 'arch/arm64/kvm/hyp/nvhe/hyp-main.c')
| -rw-r--r-- | arch/arm64/kvm/hyp/nvhe/hyp-main.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c index f25680ede080..bde658d51404 100644 --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c @@ -12,9 +12,7 @@ #include <asm/kvm_hyp.h> #include <asm/kvm_mmu.h> -#define cpu_reg(ctxt, r) (ctxt)->regs.regs[r] -#define DECLARE_REG(type, name, ctxt, reg) \ - type name = (type)cpu_reg(ctxt, (reg)) +#include <nvhe/trap_handler.h> DEFINE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params); @@ -166,7 +164,11 @@ static void skip_host_instruction(void) static void handle_host_smc(struct kvm_cpu_context *host_ctxt) { - default_host_smc_handler(host_ctxt); + bool handled; + + handled = kvm_host_psci_handler(host_ctxt); + if (!handled) + default_host_smc_handler(host_ctxt); /* * Unlike HVC, the return address of an SMC is the instruction's PC. |