diff options
| author | Quentin Perret <qperret@google.com> | 2021-03-19 13:01:43 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2021-03-19 15:02:18 +0300 |
| commit | 1025c8c0c6accfcbdc8f52ca1940160f65cd87d6 (patch) | |
| tree | 847ceaf1da72de962a340ab78b963d8cb32e7eb0 /arch/arm64/kvm/hyp/nvhe/tlb.c | |
| parent | def1aaf9e0bc6987bb4b417aac37226e994a1a74 (diff) | |
| download | linux-1025c8c0c6accfcbdc8f52ca1940160f65cd87d6.tar.xz | |
KVM: arm64: Wrap the host with a stage 2
When KVM runs in protected nVHE mode, make use of a stage 2 page-table
to give the hypervisor some control over the host memory accesses. The
host stage 2 is created lazily using large block mappings if possible,
and will default to page mappings in absence of a better solution.
>From this point on, memory accesses from the host to protected memory
regions (e.g. not 'owned' by the host) are fatal and lead to hyp_panic().
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210319100146.1149909-36-qperret@google.com
Diffstat (limited to 'arch/arm64/kvm/hyp/nvhe/tlb.c')
| -rw-r--r-- | arch/arm64/kvm/hyp/nvhe/tlb.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/kvm/hyp/nvhe/tlb.c b/arch/arm64/kvm/hyp/nvhe/tlb.c index 229b06748c20..83dc3b271bc5 100644 --- a/arch/arm64/kvm/hyp/nvhe/tlb.c +++ b/arch/arm64/kvm/hyp/nvhe/tlb.c @@ -8,6 +8,8 @@ #include <asm/kvm_mmu.h> #include <asm/tlbflush.h> +#include <nvhe/mem_protect.h> + struct tlb_inv_context { u64 tcr; }; @@ -43,7 +45,7 @@ static void __tlb_switch_to_guest(struct kvm_s2_mmu *mmu, static void __tlb_switch_to_host(struct tlb_inv_context *cxt) { - write_sysreg(0, vttbr_el2); + __load_host_stage2(); if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) { /* Ensure write of the host VMID */ |