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| author | Paolo Bonzini <pbonzini@redhat.com> | 2020-10-30 20:25:09 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-10-30 20:25:09 +0300 |
| commit | 699116c45e155925638677a74625ac9e9e046dc1 (patch) | |
| tree | a8e8ed4e325fc3b90830c508f350cd3daa89cc37 /arch/arm64/kvm/hyp/nvhe/tlb.c | |
| parent | 5a169bf04cd2bfdbac967d12eb5b70915b29d7ee (diff) | |
| parent | 22f553842b14a1289c088a79a67fb479d3fa2a4e (diff) | |
| download | linux-699116c45e155925638677a74625ac9e9e046dc1.tar.xz | |
Merge tag 'kvmarm-fixes-5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 5.10, take #1
- Force PTE mapping on device pages provided via VFIO
- Fix detection of cacheable mapping at S2
- Fallback to PMD/PTE mappings for composite huge pages
- Fix accounting of Stage-2 PGD allocation
- Fix AArch32 handling of some of the debug registers
- Simplify host HYP entry
- Fix stray pointer conversion on nVHE TLB invalidation
- Fix initialization of the nVHE code
- Simplify handling of capabilities exposed to HYP
- Nuke VCPUs caught using a forbidden AArch32 EL0
Diffstat (limited to 'arch/arm64/kvm/hyp/nvhe/tlb.c')
| -rw-r--r-- | arch/arm64/kvm/hyp/nvhe/tlb.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/kvm/hyp/nvhe/tlb.c b/arch/arm64/kvm/hyp/nvhe/tlb.c index 39ca71ab8866..fbde89a2c6e8 100644 --- a/arch/arm64/kvm/hyp/nvhe/tlb.c +++ b/arch/arm64/kvm/hyp/nvhe/tlb.c @@ -128,7 +128,6 @@ void __kvm_tlb_flush_local_vmid(struct kvm_s2_mmu *mmu) struct tlb_inv_context cxt; /* Switch to requested VMID */ - mmu = kern_hyp_va(mmu); __tlb_switch_to_guest(mmu, &cxt); __tlbi(vmalle1); |