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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2020-12-07 12:19:20 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-12-07 14:00:24 +0300 |
| commit | 4165bf015ba9454f45beaad621d16c516d5c5afe (patch) | |
| tree | 1b525baa0e3c424fff2f35d14a24382f3a0ad47b /arch/arm | |
| parent | d76b42e92780c3587c1a998a3a943b501c137553 (diff) | |
| download | linux-4165bf015ba9454f45beaad621d16c516d5c5afe.tar.xz | |
iommu/amd: Set DTE[IntTabLen] to represent 512 IRTEs
According to the AMD IOMMU spec, the commit 73db2fc595f3
("iommu/amd: Increase interrupt remapping table limit to 512 entries")
also requires the interrupt table length (IntTabLen) to be set to 9
(power of 2) in the device table mapping entry (DTE).
Fixes: 73db2fc595f3 ("iommu/amd: Increase interrupt remapping table limit to 512 entries")
Reported-by: Jerry Snitselaar <jsnitsel@redhat.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
Link: https://lore.kernel.org/r/20201207091920.3052-1-suravee.suthikulpanit@amd.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions