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| author | Sonic Zhang <sonic.zhang@analog.com> | 2013-12-04 11:27:47 +0400 |
|---|---|---|
| committer | Steven Miao <realmz6@gmail.com> | 2014-01-29 11:12:20 +0400 |
| commit | 1b6012394bec5dc653d495245c5495db08f817f6 (patch) | |
| tree | 88c290099d8155fd3c4c5828843c29837c815e05 /arch/blackfin/include | |
| parent | cccdfcf728e2f322e8986a39bc02bf5aaa8fe8a7 (diff) | |
| download | linux-1b6012394bec5dc653d495245c5495db08f817f6.tar.xz | |
blackfin: Support L1 SRAM parity checking feature on bf60x
Move code for the SEC faults from the IRQ hanlders into IRQ actions.
refine bfin fault routine handle
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Steven Miao <realmz6@gmail.com>
Diffstat (limited to 'arch/blackfin/include')
| -rw-r--r-- | arch/blackfin/include/asm/def_LPBlackfin.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h index ca67145c6a45..c5c8d8a3a5fa 100644 --- a/arch/blackfin/include/asm/def_LPBlackfin.h +++ b/arch/blackfin/include/asm/def_LPBlackfin.h @@ -544,6 +544,7 @@ do { \ #define DCBS_P 0x04 /* L1 Data Cache Bank Select */ #define PORT_PREF0_P 0x12 /* DAG0 Port Preference */ #define PORT_PREF1_P 0x13 /* DAG1 Port Preference */ +#define RDCHK 0x9 /* Enable L1 Parity Check */ /* Masks */ #define ENDM 0x00000001 /* (doesn't really exist) Enable |