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authorSteven Miao <realmz6@gmail.com>2013-04-19 14:22:21 +0400
committerSteven Miao <realmz6@gmail.com>2013-05-09 14:22:45 +0400
commit5ae89ee043ce96e3790e6c75f3807c8e37d98634 (patch)
treec54cc18e61006fe4bed77fb2a15e58e6afb12348 /arch/blackfin/include
parent5b0830914ae423c840a01ccdfac2dbf1dd1a426b (diff)
downloadlinux-5ae89ee043ce96e3790e6c75f3807c8e37d98634.tar.xz
bfin cache: dcplb map: add 16M dcplb map for BF60x
use 16M data cplb map on BF60x to avoid too much dcplb miss overhead cleanup cplb info Signed-off-by: Steven Miao <realmz6@gmail.com>
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/def_LPBlackfin.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h
index fe0ca03a1cb2..ca67145c6a45 100644
--- a/arch/blackfin/include/asm/def_LPBlackfin.h
+++ b/arch/blackfin/include/asm/def_LPBlackfin.h
@@ -622,10 +622,12 @@ do { \
#define PAGE_SIZE_4KB 0x00010000 /* 4 KB page size */
#define PAGE_SIZE_1MB 0x00020000 /* 1 MB page size */
#define PAGE_SIZE_4MB 0x00030000 /* 4 MB page size */
+#ifdef CONFIG_BF60x
#define PAGE_SIZE_16KB 0x00040000 /* 16 KB page size */
#define PAGE_SIZE_64KB 0x00050000 /* 64 KB page size */
#define PAGE_SIZE_16MB 0x00060000 /* 16 MB page size */
#define PAGE_SIZE_64MB 0x00070000 /* 64 MB page size */
+#endif
#define CPLB_L1SRAM 0x00000020 /* 0=SRAM mapped in L1, 0=SRAM not
* mapped to L1
*/