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authorAlexandre Ghiti <alexghiti@rivosinc.com>2023-12-13 00:34:56 +0300
committerDennis Zhou <dennis@kernel.org>2023-12-14 11:23:17 +0300
commit7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b (patch)
treef02aada180e46f0f74910d88d85b96c0f181061e /arch/csky/abiv2
parent33cc938e65a98f1d29d0a18403dbbee050dcad9a (diff)
downloadlinux-7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b.tar.xz
mm: Introduce flush_cache_vmap_early()
The pcpu setup when using the page allocator sets up a new vmalloc mapping very early in the boot process, so early that it cannot use the flush_cache_vmap() function which may depend on structures not yet initialized (for example in riscv, we currently send an IPI to flush other cpus TLB). But on some architectures, we must call flush_cache_vmap(): for example, in riscv, some uarchs can cache invalid TLB entries so we need to flush the new established mapping to avoid taking an exception. So fix this by introducing a new function flush_cache_vmap_early() which is called right after setting the new page table entry and before accessing this new mapping. This new function implements a local flush tlb on riscv and is no-op for other architectures (same as today). Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Dennis Zhou <dennis@kernel.org>
Diffstat (limited to 'arch/csky/abiv2')
-rw-r--r--arch/csky/abiv2/inc/abi/cacheflush.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/csky/abiv2/inc/abi/cacheflush.h b/arch/csky/abiv2/inc/abi/cacheflush.h
index 40be16907267..6513ac5d2578 100644
--- a/arch/csky/abiv2/inc/abi/cacheflush.h
+++ b/arch/csky/abiv2/inc/abi/cacheflush.h
@@ -41,6 +41,7 @@ void flush_icache_mm_range(struct mm_struct *mm,
void flush_icache_deferred(struct mm_struct *mm);
#define flush_cache_vmap(start, end) do { } while (0)
+#define flush_cache_vmap_early(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \