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authorWANG Xuerui <git@xen0n.name>2023-05-01 12:19:27 +0300
committerHuacai Chen <chenhuacai@loongson.cn>2023-05-01 12:19:27 +0300
commit325a38b511caff53c10393bab1e59cbd37f15ec2 (patch)
tree041da1bd1b28c90fa9ac56a9196fd1f2ae9fec7f /arch/loongarch/kernel/genex.S
parent98b90ede59472de5931b7e4d72c3ff948eaa19a4 (diff)
downloadlinux-325a38b511caff53c10393bab1e59cbd37f15ec2.tar.xz
LoongArch: Tweak the BADV and CPUCFG.PRID lines in show_regs()
Use ISA manual names for BADV and CPUCFG.PRID lines in show_regs(), for stylistic consistency with the other lines already touched. While at it, also include current CPU's full name in show_regs() output. It may be more helpful for developers looking at the resulting dumps, because multiple distinct CPU models may share the same PRID. Not having this info available may hide problems only found on some but not all of the models sharing one specific PRID. Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/kernel/genex.S')
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