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authorHuacai Chen <chenhuacai@loongson.cn>2022-10-20 17:25:35 +0300
committerMarc Zyngier <maz@kernel.org>2022-11-26 16:07:47 +0300
commit70f7b6c008b37a0beb956e25a6c167edfd4b259e (patch)
tree796dfb335b95c592cf5d12d3d3908b7871f2946f /arch/loongarch
parent17343d0b4039196517ab5c40d8fce3e8d394c526 (diff)
downloadlinux-70f7b6c008b37a0beb956e25a6c167edfd4b259e.tar.xz
irqchip/loongson-htvec: Add ACPI init support
HTVECINTC stands for "HyperTransport Interrupts" that described in Section 14.3 of "Loongson 3A5000 Processor Reference Manual". For more information please refer Documentation/loongarch/irq-chip-model.rst. Though the extended model is the recommended one, there are still some legacy model machines. So we add ACPI init support for HTVECINTC. Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221020142535.1725573-1-chenhuacai@loongson.cn
Diffstat (limited to 'arch/loongarch')
-rw-r--r--arch/loongarch/include/asm/irq.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/loongarch/include/asm/irq.h b/arch/loongarch/include/asm/irq.h
index d06d4542b634..9d3d36e41afe 100644
--- a/arch/loongarch/include/asm/irq.h
+++ b/arch/loongarch/include/asm/irq.h
@@ -93,7 +93,7 @@ int liointc_acpi_init(struct irq_domain *parent,
int eiointc_acpi_init(struct irq_domain *parent,
struct acpi_madt_eio_pic *acpi_eiointc);
-struct irq_domain *htvec_acpi_init(struct irq_domain *parent,
+int htvec_acpi_init(struct irq_domain *parent,
struct acpi_madt_ht_pic *acpi_htvec);
int pch_lpc_acpi_init(struct irq_domain *parent,
struct acpi_madt_lpc_pic *acpi_pchlpc);