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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-10-20 15:49:13 +0300
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-10-24 18:24:47 +0300
commit95b8a5e0111a47e5ef780c04cb6293be33d6ee0d (patch)
tree0c54fd731b6ba11ed813b9225b4484042e281c71 /arch/mips/Kconfig
parent626bfa03729959ea9917181fb3d8ffaa1594d02a (diff)
downloadlinux-95b8a5e0111a47e5ef780c04cb6293be33d6ee0d.tar.xz
MIPS: Remove NETLOGIC support
No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig91
1 files changed, 2 insertions, 89 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 35aab081917f..0610a7bb8a7a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -994,60 +994,6 @@ config CAVIUM_OCTEON_SOC
Hikari
Say Y here for most Octeon reference boards.
-config NLM_XLR_BOARD
- bool "Netlogic XLR/XLS based systems"
- select BOOT_ELF32
- select NLM_COMMON
- select SYS_HAS_CPU_XLR
- select SYS_SUPPORTS_SMP
- select HAVE_PCI
- select SWAP_IO_SPACE
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
- select PHYS_ADDR_T_64BIT
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_HIGHMEM
- select NR_CPUS_DEFAULT_32
- select CEVT_R4K
- select CSRC_R4K
- select IRQ_MIPS_CPU
- select ZONE_DMA32 if 64BIT
- select SYNC_R4K
- select SYS_HAS_EARLY_PRINTK
- select SYS_SUPPORTS_ZBOOT
- select SYS_SUPPORTS_ZBOOT_UART16550
- help
- Support for systems based on Netlogic XLR and XLS processors.
- Say Y here if you have a XLR or XLS based board.
-
-config NLM_XLP_BOARD
- bool "Netlogic XLP based systems"
- select BOOT_ELF32
- select NLM_COMMON
- select SYS_HAS_CPU_XLP
- select SYS_SUPPORTS_SMP
- select HAVE_PCI
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
- select PHYS_ADDR_T_64BIT
- select GPIOLIB
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_HIGHMEM
- select NR_CPUS_DEFAULT_32
- select CEVT_R4K
- select CSRC_R4K
- select IRQ_MIPS_CPU
- select ZONE_DMA32 if 64BIT
- select SYNC_R4K
- select SYS_HAS_EARLY_PRINTK
- select USE_OF
- select SYS_SUPPORTS_ZBOOT
- select SYS_SUPPORTS_ZBOOT_UART16550
- help
- This board is based on Netlogic XLP Processor.
- Say Y here if you have a XLP based board.
-
endchoice
source "arch/mips/alchemy/Kconfig"
@@ -1070,7 +1016,6 @@ source "arch/mips/cavium-octeon/Kconfig"
source "arch/mips/loongson2ef/Kconfig"
source "arch/mips/loongson32/Kconfig"
source "arch/mips/loongson64/Kconfig"
-source "arch/mips/netlogic/Kconfig"
endmenu
@@ -1786,32 +1731,6 @@ config CPU_BMIPS
help
Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
-config CPU_XLR
- bool "Netlogic XLR SoC"
- depends on SYS_HAS_CPU_XLR
- select CPU_SUPPORTS_32BIT_KERNEL
- select CPU_SUPPORTS_64BIT_KERNEL
- select CPU_SUPPORTS_HIGHMEM
- select CPU_SUPPORTS_HUGEPAGES
- select WEAK_ORDERING
- select WEAK_REORDERING_BEYOND_LLSC
- help
- Netlogic Microsystems XLR/XLS processors.
-
-config CPU_XLP
- bool "Netlogic XLP SoC"
- depends on SYS_HAS_CPU_XLP
- select CPU_SUPPORTS_32BIT_KERNEL
- select CPU_SUPPORTS_64BIT_KERNEL
- select CPU_SUPPORTS_HIGHMEM
- select WEAK_ORDERING
- select WEAK_REORDERING_BEYOND_LLSC
- select CPU_HAS_PREFETCH
- select CPU_MIPSR2
- select CPU_SUPPORTS_HUGEPAGES
- select MIPS_ASID_BITS_VARIABLE
- help
- Netlogic Microsystems XLP processors.
endchoice
config CPU_MIPS32_3_5_FEATURES
@@ -2058,12 +1977,6 @@ config SYS_HAS_CPU_BMIPS5000
select SYS_HAS_CPU_BMIPS
select ARCH_HAS_SYNC_DMA_FOR_CPU
-config SYS_HAS_CPU_XLR
- bool
-
-config SYS_HAS_CPU_XLP
- bool
-
#
# CPU may reorder R->R, R->W, W->R, W->W
# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
@@ -2158,7 +2071,7 @@ config CPU_SUPPORTS_HUGEPAGES
config MIPS_PGD_C0_CONTEXT
bool
depends on 64BIT
- default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
+ default y if (CPU_MIPSR2 || CPU_MIPSR6)
#
# Set to y for ptrace access to watch registers.
@@ -2841,7 +2754,7 @@ config NODES_SHIFT
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
- depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
+ depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
default y
help
Enable hardware performance counter support for perf events. If