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authorPaul Menzel <pmenzel@molgen.mpg.de>2019-09-02 12:55:06 +0300
committerPaul Burton <paulburton@kernel.org>2019-11-02 00:33:07 +0300
commit474435a058309cf1a253dbd77cac2ab89c75d4a6 (patch)
treee7c0a03404d0e838ce00d95a96fdab548d7d1f14 /arch/mips/cavium-octeon/setup.c
parent6fbde6b492dfc761ad60a68fb2cb32b1eb05b786 (diff)
downloadlinux-474435a058309cf1a253dbd77cac2ab89c75d4a6.tar.xz
mips/cavium-octeon: Fix typo *must* in comment
Fixes: 5b3b16880f ("MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.") Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/cavium-octeon/setup.c')
-rw-r--r--arch/mips/cavium-octeon/setup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 95034bf5ca83..1f742c32a883 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -844,7 +844,7 @@ void __init prom_init(void)
* BIST should always be enabled when doing a soft reset. L2
* Cache locking for instance is not cleared unless BIST is
* enabled. Unfortunately due to a chip errata G-200 for
- * Cn38XX and CN31XX, BIST msut be disabled on these parts.
+ * Cn38XX and CN31XX, BIST must be disabled on these parts.
*/
if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2) ||
OCTEON_IS_MODEL(OCTEON_CN31XX))