summaryrefslogtreecommitdiff
path: root/arch/mips/include/asm/irq.h
diff options
context:
space:
mode:
authorDavid VomLehn <dvomlehn@cisco.com>2009-12-22 04:49:22 +0300
committerRalf Baechle <ralf@linux-mips.org>2010-01-28 02:03:31 +0300
commit010c108d7af708d9e09b83724a058a76803fbc66 (patch)
tree6b7108e6852b0306ecd686a8ce9b9ae5733985fa /arch/mips/include/asm/irq.h
parent59dfa2fcaecc39fb88bfa196cb15adca7146867a (diff)
downloadlinux-010c108d7af708d9e09b83724a058a76803fbc66.tar.xz
MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs
The MIPS processor is limited to 64 external interrupt sources. Using a greater number without IRQ sharing requires reading platform-specific registers. On such platforms, reading the IntCtl register to determine which interrupt corresponds to a timer interrupt will not work. On MIPSR2 systems there is a solution - the TI bit in the Cause register, specifically indicates that a timer interrupt has occured. This patch uses that bit to detect interrupts for MIPSR2 processors, which may be expected to work regardless of how the timer interrupt may be routed in the hardware. Signed-off-by: David VomLehn (dvomlehn@cisco.com) To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/804/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/irq.h')
-rw-r--r--arch/mips/include/asm/irq.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 06960364c96b..dea4aed6478f 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -135,6 +135,7 @@ extern void free_irqno(unsigned int irq);
#define CP0_LEGACY_COMPARE_IRQ 7
extern int cp0_compare_irq;
+extern int cp0_compare_irq_shift;
extern int cp0_perfcount_irq;
#endif /* _ASM_IRQ_H */